Lattice CrossLink LIF-MD6000 Master Link Board - Revision C User Manual page 21

5
VBUS_5V
D
C5
L3 0.1uF
600ohm 500mA
J2
9 1
SHIELD4 VCC
8 2
SHIELD3 D-
3
D+
7 4 R4 0
SHIELD2 ID
6 5
SHIELD1 GND
C6 0.1uF
SKT_MINIUSB_B_RA
L9
2 1
600ohm 500mA
1
USB_DP 2
C
USB_DM
3
+3.3V
+3.3V
R12 R13 R14
U2 10K 10K 10K
8 1
VCC CS
7 2
NU CLK
6 3
ORG DI
C9 5 4
VSS DO
12k
0.1uF 93LC56-SO8
B
+3.3V
C191 C13 C14 C15
10uF 0.1uF 0.1uF 0.1uF
A
5
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02018-1.0
4
+3.3V
L1
2 1
600ohm 500mA
C1
4u7
+3.3V
L2
2 1
600ohm 500mA
C3
4u7
USB_DM
USB_DP
VCC1_8FT +3.3V
VBUS_5V
U20
6
GND VBUS
5
NC1 D+
4
NC2 D-
C7 C8
ESDR0502N
R10 2k2
10uF 0.1uF
R11
R17
X1
1 3
1 3
2 4
G1 G2
C10
18pF
12MHZ
0 R18
{7} 12MHZ
DNI
C16
0.1uF
4
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3
C2
0.1uF
PROGRAMMING INTERFACE
C4 VCC1_8FT +3.3V
0.1uF
U1
FT2232HL
16
ADBUS0
50 17
VREGIN ADBUS1
18
ADBUS2
49 19
VREGOUT ADBUS3
J37 21
ADBUS4
22
ADBUS5
1 7 23
DM ADBUS6
2 8 24
DP ADBUS7
CON2
26
ACBUS0
14 27
RESET# ACBUS1
28
ACBUS2
4V C201 1uF 29
ACBUS3
6 30
REF ACBUS4
12k 32
ACBUS5
33
ACBUS6
34
ACBUS7
FT_EECS 63
EECS
FT_EECLK
62 38
EECLK BDBUS0
FT_EEDATA 61 39
EEDATA BDBUS1
40
BDBUS2
41
BDBUS3
2 43
OSCI BDBUS4
44
BDBUS5
45
BDBUS6
46
BDBUS7
3
OSCO
48
BCBUS0
52
BCBUS1
C11 53
BCBUS2
13 54
18pF
TEST BCBUS3
55
BCBUS4
57
BCBUS5
FTDI High-Speed USB 58
BCBUS6
59
BCBUS7
FT2232H
60
PWREN#
36
SUSPEND#
J16
1-2 For SPI
3-2 For I2C
HEADER 3
Manual selection for I2C/SPI
3
FTDI Interface
CrossLink LIF-MD6000 Master Link Board - Revision C
Evaluation Board User Guide
2
+3.3V
R3 R1 R2
4.7k 4.7k 4.7k
+3.3V
J1
VCC1_8FT
1
1
2
TDO
2
3 TDI
3
4
4
C193 C194 5
5
6 TMS
6
0.1uF 0.1uF 7
7
8 TCK
8
R9
header_1x8
2k2
0 R5
0 R6
0 R7
0 R167
0 DNI R23
CDONE {6}
0 R26
CRESETB {6}
0 R496
+3.3V
C196
0.1uF
0 R15
0 R16
0 R180
0 R181
U21
2
VCC
16
D1
5
D2
8
D3
13
D4
3
123SEL
10
4SEL
11
GND
STG3693QTR
Note : U21 Exposed pad must be soldered to a floating plane.
Do NOT connect to power or ground.
+3.3V
R171
4.7k
1
2
Lattice Semiconductor Applications Lattice Semiconductor Applications Lattice Semiconductor Applications
3
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Title Title Title
FTDI INTERFACE FTDI INTERFACE FTDI INTERFACE
Size Size Size Project Project Project
B B B
CrossLink_Master_Multi-Link_Board CrossLink_Master_Multi-Link_Board CrossLink_Master_Multi-Link_Board
Date: Date: Date: 28-Mar-17 28-Mar-17 28-Mar-17
2
1
D
CSSPIN {4,5,6}
C
TCK {7}
TDI {7}
TDO {7}
TMS {7}
15
MCLK {6}
1S1
1
1S2 USB_SCL {6}
4
2S1 SISPI {4,5,6}
6
B
2S2
7
SPISO {4,5,6}
3S1
9
3S2 USB_SDA {6}
12
4S1
14
4S2
A
Schematic Rev Schematic Rev Schematic Rev 1.0 1.0 1.0
Board Rev Board Rev Board Rev 1 1 1
Sheet Sheet Sheet 2 2 2 of of of 8 8 8
1
21