Reset & Power Supply Supervisor; Power On Reset (Por) / Power Down Reset (Pdr); Figure 2. Power Supply Scheme - ST STM32F20 Series Application Note

AN3320
Figure 2.
1. Optional. If a separate, external reference voltage is connected on V
1 µF) must be connected.
2. V + is either connected to V
REF
3. N is the number of V
4. Refer to section "Voltage regulator" in STM32F20xxx/21xxx datasheet to connect REGOFF and IRROFF
pins.
1.3 Reset & power supply supervisor
1.3.1

Power on reset (POR) / power down reset (PDR)

The device has an integrated POR/PDR circuitry that allows proper operation starting from
1.8 V.
The device remains in the Reset mode as long as V
V
POR/PDR
power on/power down reset threshold, refer to the electrical characteristics in
STM32F20xxx/21xxx datasheets.
On WLCSP66 package if IRROFF pin is set to V
activated, refer to section "Voltage regulator" in STM32F20xxx/21xxx datasheet for details ),
the PDR is not functional. Then the V
must ensure that reset pin is activated when V
Power supply scheme
or to V
REF
and V inputs.
DD SS
, without the need for an external reset circuit. For more details concerning the
Doc ID 18267 Rev 2
REF+
.
DDA
is below a specified threshold,
DD
(in that case REGOFF pin must not be
DD
can lower below 1.8 V, but the external circuitry
DD
/V becomes below 1.65 V.
DD DDA
Power supplies
, the two capacitors (100 nF and
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