Design Authentication; The Configuration Bitstream - Intel Stratix 10 User Manual

UG-S10SECURITY | 2019.05.10
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2. Design Authentication

For networked systems, every power up or remote system upgrade to an
unauthenticated bitstream is vulnerable to attack. Malicious attacks can occur because
the FPGA does not verify that configuration bitstream is from a trusted source. Intel
Stratix 10 FPGAs include a feature to authenticate the bitstream, guaranteeing that
the bitstream is from a trusted source. Authentication uses signature keys to validate
the content of a bitstream, preventing the Intel Stratix 10 FPGA from configuring with
an unauthorized configuration bitstream.
When you use authentication, your manufacturing process programs the hash digest
of the Elliptic Curve Digital Signature Algorithm (ECDSA) public signature key into
FPGA eFuses. The configuration bitstream contains the public signature key. The SDM
compares the hash digest of configuration bitstream public signature key to the hash
digest stored in eFuses. The SDM only loads the bitstream if the values match.
You can choose either ECDSA256 or ECDSA384. The ECDSA256 and ECDSA384 use
the SHA-256 and SHA-384 cryptographic hash function to create the secure hash.
Intel recommends that you use 384-bit algorithm. The 256-bit algorithm is weaker
than the algorithm and consequently more likely to become vulnerable to attack. Use
the 256-bit algorithm if you have a custom hardware security module (HSM) that does
not accept SHA-384 hashes. SHA-384 generates a bitstream that is larger than
SHA-256. SHA-384 hashes result in longer configuration times.

2.1. The Configuration Bitstream

The figure below shows an Intel Stratix 10 configuration bitstream that includes an
FPGA and HPS. The firmware section is static and is dependent on the Intel Quartus
Prime version.
The SDM always authenticates the firmware configuration bitstream whether you
choose to authenticate the other dynamic sections of the bitstream. To create an
additional level of security, you may request joint signing for the configuration
bitstream by programming the Joint Signature fuse on the device. When the Joint
Signature fuse is programmed, the device checks for an owner signature on the
firmware section of the configuration bitstream. The device only runs firmware with
both signatures.
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