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6.6
Signal Selection - Address 06h
7
6
SDINSel
Reserved
6.6.1
DAC SDIN Source (Bit 7)
Function:
This bit is used to select the serial audio data source for the DAC as shown in
6.6.2
Digital Loopback (Bit 1)
Function:
When this bit is set, an internal digital loopback from the ADC to the DAC will be enabled. Please refer to
"Internal Digital Loopback" on page
6.7
Channel B PGA Control - Address 07h
7
6
Reserved
Reserved
6.7.1
Channel B PGA Gain (Bits 5:0)
Function:
See
"Channel A PGA Gain (Bits 5:0)" on page 40.
6.8
Channel A PGA Control - Address 08h
7
6
Reserved
Reserved
6.8.1
Channel A PGA Gain (Bits 5:0)
Function:
Sets the gain or attenuation for the ADC input PGA stage. The gain may be adjusted from -12 dB to
+12 dB in 0.5 dB steps. The gain bits are in two's complement with the Gain0 bit set for a 0.5 dB step.
Register settings outside of the ±12 dB range are reserved and must not be used. See
ample settings.
40
5
4
Reserved
Reserved
SDINSel Setting
0
1
Table 12. DAC SDIN Source Selection
29.
5
4
Gain5
Gain4
5
4
Gain5
Gain4
Gain[5:0]
101000
000000
011000
Table 13. Example Gain and Attenuation Settings
3
2
Reserved
Reserved
DAC Data Source
SDIN1
SDIN2
3
2
Gain3
Gain2
3
2
Gain3
Gain2
Setting
-12 dB
0 dB
+12 dB
CS4265
1
0
LOOP
Reserved
Table
12.
1
0
Gain1
Gain0
1
0
Gain1
Gain0
Table 13
for ex-
DS657F3
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