Switching Characteristics - I²C Control Port; Figure 8.Control Port Timing - I²C Format - Cirrus Logic CS4265 Manual

SWITCHING CHARACTERISTICS - I²C CONTROL PORT
Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, C
SCL Clock Frequency
RESET Rising Edge to Start
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup time to SCL Rising
Rise Time of SCL and SDA
Fall Time SCL and SDA
Setup Time for Stop Condition
Acknowledge Delay from SCL Falling
24. Data must be held for sufficient time to bridge the transition time, t
25. Guaranteed by design.
R S T
t
irs
Stop Sta rt
S D A
t
buf
S C L
22
Parameter
t
t
high
hdst
t t t sud
lo w hdd
Figure 8. Control Port Timing - I²C Format
= 30 pF.
L
Symbol
f
scl
t
irs
t
buf
t
hdst
t
low
t
high
t
sust
(Note 24) t
hdd
t
sud
(Note 25) t , t
rc rd
(Note 25) t , t
fc fd
t
susp
t
ack
t ack
Min Max
- 100
500 -
4.7 -
4.0 -
4.7 -
4.0 -
4.7 -
0 -
250 -
- 1
- 300
4.7 -
300 1000
, of SCL.
fc
R e p e ate d
Sta rt
t rd
t
t fc
hdst
t sust t rc
CS4265
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
Stop
t fd
t susp
DS657F3