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0
1
2
SCL
CHIP ADDRESS (WRITE)
1
0
0
SDA
START
0
1
2
3
4
SCL
CHIP ADDRESS (WRITE)
SDA
1
0
0
1
1
START
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in
Figure
16, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-
dition. The following pseudocode illustrates an aborted write operation followed by a read operation.
Send start condition.
Send 100111x0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 100111x1(chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
4.14
Status Reporting
The CS4265 has comprehensive status reporting capabilities. Many conditions can be reported in the status
register, as listed in the status register descriptions. See
may be masked off through mask register bits. In addition, each source may be set to ris ing edge, falling
edge, or level sensitive. Combined with the option of level-sensitive or edge-sensitive modes within the mi-
crocontroller, many different configurations are possible, depending on the needs of the equipment design-
er.
32
3
4
5
6
7
8
9
10 11
MAP BYTE
1
1
1 AD0 0
7
6
5
ACK
Figure 15. Control Port Timing, I²C Write
5
6
7
8
9
10 11
12 13 14 15
MAP BYTE
7
6
5
4
3
1
AD0
0
ACK
Figure 16. Control Port Timing, I²C Read
12
13 14 15
16 17 18
19
24 25
DATA
4
3
2
1
0
7
6
ACK
16
17 18
19
20 21 22 23 24
STOP
CHIP ADDRESS (READ)
2
1
0
1
0
0
1
1
ACK
START
"Status - Address 0Dh" on page
26
27 28
DATA +1
DATA +n
1
0
7
6
1
0
7
ACK
25
26 27 28
DATA
DATA +1
1
AD0 1
7
0
7
ACK
ACK
CS4265
6
1
0
ACK
STOP
DATA + n
0
7
0
NO
ACK
STOP
43. Each source
DS657F3
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