Typical Connection Diagram; Figure 9.Typical Connection Diagram - Cirrus Logic CS4265 Manual

3. TYPICAL CONNECTION DIAGRAM

+3.3V to +5V
+1.8V
to +5V
0.1 µF
Digital Audio
Processor
Digital Audio
Output
Micro-
Controller
2 k 
+1.8V
Note 1
to +5V
Note 1: Resistors are required for I²C control
port operation
Note 3: The value of R is dictated by the
L
microphone carteridge.
Note 4: Sets the LSB of the 7-bit chip address.
See the I²C Control Port Description and
Timing section.
DS657F3
10 µF
0.1 µF
VD
VLS
47 k
Note 4
SDOUT
SDIN1
SDIN2
TXSDIN
CS4265
MCLK
SCLK
LRCK
TXOUT
RST
SCL
SDA
2 k 
VLC
0.1 µF
DGND
Figure 9. Typical Connection Diagram
0.1 µF
10 µF
0.1 µF
VA VA
MUTEC
3.3 µF
AOUTA
10 k
10 k
AOUTB
3.3 µF
Note 2 :
For best response to Fs/2 :
C
This circuitry is intended for applications where the CS4265
connects directly to an unbalanced output of the design . For internal
routing applications please see the DAC Analog Output
Characteristics section for loading limitations.
AIN1A
*
10 µF
SGND
*
AIN1B
10 µF
MICIN1
MICIN2
10 µF
Note 3
MICBIAS
FILT+
0.1 µF
AGND
AGND
*
2.2nF
AFILTA
AFILTB
VQ
* Capacitors must be C0G or equivalent
+3.3V to +5V
Mute
Drive
470
*
C
Optional
Analog
Muting
*
C
470

R 470

ext
 


4 Fs R 470
ext
10 µF
100 
Left Analog Input 1
1800 pF 100 k
Signal Ground
1800 pF 100 k
Right Analog Input 1
100 
10 µF
Microphone Input 1
Microphone Input 2
R R
L L
10 µF
47 µF
*
2.2nF
10 µF
0.1 µF
CS4265
See Note 2
R
ext
R
ext
23