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6.3.4
Minimum V
It is particularly important that the Vcc voltage must stay above V
low standby power cannot be achieved. The IC will go into auto-restart mode instead of Active Burst Mode. A
reference Vcc circuit is presented in Figure 5. This is for a low cost transformer design where the transformer
coupling is not too good. Thus the circuit R3 and Zd1 is added to clamp the Vcc voltage exceeding 25V in
extreme case such as high load and the Vcc OVP protection is triggered. If the transformer coupling is good,
this circuit is not needed.
6.4
Low EMI noise
6.4.1
Frequency jittering
The IC is running at a fixed frequency of 65 KHz with jittering frequency at +/-2.6 KHz in a switching
modulation period of 4ms. This kind of frequency modulation can effectively help to obtain a low EMI noise
level particularly for conducted EMI. The jittering frequency measured is 63.8 KHz ~ 67.4 KHz (refer to
Figure 12).
63.8kHz
67.4kHz
V
DS
Figure 12
Switching frequency jittering ( Vds )
6.4.2
Soft gate drive
The gate soft driving is to split the gate driving slope into 2 so that the MOSFET turns on speed is relatively
slower comparing to a single slope drive (see Figure 13). In this way, the high ∆I/∆t noise is greatly reduced
and the noise signal reflected in the EMI spectrum is also reduced.
Figure 13
Soft gate drive waveform
Application Note
supply voltage during burst mode
CC
(i.e. 10.5V)
VCCoff
Channel 1; C1 : Drain to Source Voltage (V
Frequency jittering at full load @ Vin=85Vac
13
ICE3BRXX65J(Z)(G)
Otherwise, the expected
.
)
DS
2010-06-20
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