This application note is intended to provide a description of the operation of IRPS5401 and the performance of the DB295 (orderable as EVAL_PS5401-25 or EVAL_PS5401-40) and DB296 (orderable as EVAL_PS5401-INT) demo boards.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Introduction Table of contents About this document ........................1 Table of contents ..........................2 Introduction .......................... 3 I2C ADDRESS, PMBUS address, and address offset ..............4 ADDR_PROT Pin ............................6 TEST ADDRESS 0Ah ..........................
User guide with DB295 and DB296 demo boards Introduction This document will describe the operation of the IRPS5401 PMIC. This document will also cover the details of the DB295 (available as EVAL_PS5401-25 for 25A power stage and EVAL_PS5401-40 for 40A power stage) and DB296 (available as EVAL_PS5401-INT) IRPS5401 demo boards.
I2C ADDRESS, PMBUS address, and address offset The IRPS5401 has 2 addresses; an I2C address for direct register read write access and a PMBus address for sending PMBus commands. With the IRPS5401 powered up and the GUI communicating with the USB dongle (1), you should be able to hit the Auto-populate button (2) and have the GUI recognize and populate the IRPS5401 information (3).
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After the addresses have been updated in REG 0x0020, you will need to right click on the device (1) to bring up the address editor dialog box (2) to update the addresses (3) that the GUI must use to communicate with the IRPS5401 to the new values that where placed in REG 0x0020. Application Note 5 of 63 V 1.2...
The base I2C and PMBus address that is placed in NVM can be offset by up to fifteen (15) so that up to sixteen (16) IRPS5401 devices with a common NVM address can be placed on a common I2C/PMBus. This feature is activated by setting 0x0028 bit [2], i2c_take_addr_from_ext, to 1.
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The resistor must be connected from ADDR_PROT to AGND (pin 50). The resistor must be decoupled with a 10 nF capacitor (X7R type). The IRPS5401 will source 100 µA through the offset resistor for 1 ms immediately after POR, the ADC will measure the voltage drop on the resistor and the value will be latched into the digital core.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards LDO Operation The LDO input is pin 22. The input voltage has a range of 1.2 V to 5.5 V. The LDO output is pin 23. Figure 9...
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 11 Tracking mode Fault settings All PMBus OV and UV CMD’s are READ ONLY for the LDO. A read command will report back the percentage of VOUT shown in the table below.
User guide with DB295 and DB296 demo boards Switcher Operation The IRPS5401 consists of 4 internal switching regulators (Switchers). SW-A and B are 2 A regulators. SW-C and D are 4A regulators. SW-A can be configured to drive an external power stage such as the TDA21240 PowerStage or a discrete FET driver with power FET.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards The 5x5 via pattern under the IRPS5401; these help transfer heat from the IC to the copper GND planes on the PCB Decouple VCC, MTP, and ADDR_PROT pins directly to AGND (pin 50) and tie AGND to GND with a single point connection (see arrow above) ...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 14 AOT mode There are 4 configuration registers for each switcher that need to be set so that AOT mode operates correctly. Diode_emu_threshold is the threshold below the DAC voltage that will cause the AOT pulse to start. This is usually set to 1 ...
The IRPS5401 has a sync input (pin 52) that can be used to set the FSW to an external clock. The threshold levels are LVTTL, 0.8V max for low and 2.1V min for high. The FSW setting for the IRPS5401 must be within a +/- 6.5% window of the desired sync frequency.
The PMBus commands OC_WARN_LIMIT and OC_FAULT_LIMIT have a range of 0 A to 15.97 A in increments of 31.25 mA. This means that the user can send a command and the IRPS5401 will ACK the command as valid. However, the OC_FAULT_LIMIT is actually based on the comparator input which can only be set from 0 A to 4 A in 0.25 A increments for the 2 A output and from 0 A to 8 A in 0.5 A increments for the 4 A outputs.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Inductor Current Output Inductor To VOUT Control FET READ_IOUT Telemetry Digital Core Set at ATE trim OC WARN Comparator isc_scale 1.33, Sync FET 72KHz TEMP COMP 1.66,...
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Set the fixed_ovp_thresh greater than the largest VOUT_COMMAND value that will be seen in the application. The logic will switch from relative threshold to the fixed threshold when the Enable goes low, (or OPERATION off command).
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards The OV_WARN_LIMIT is not a relative threshold. It is the absolute value set by the user. The user can cause an OV_WARN flag by sending a VOUT_COMMAND greater than the OV_WARN_LIMIT threshold.
UV_WARN flag by sending a VOUT_COMMAND less than the UV_WARN_LIMIT. Over Temperature The IRPS5401 has two (2) on die temp sensors; one for SW-A and B and one for SW-C, D and the LDO. A READ_TEMPERATURE_1 command to SW-A or SW-B will report the same value. A READ_TEMPERATURE_1 command to SW-C, D or the LDO will report the same value.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards 4.10 ½ Scaling of VOUT If VOUT is > 2.55 V, VOUT will need to be scaled by 1/2. This means a resistor divider will need to be used to divide the output voltage by 1/2.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards to 5 V, the additional 75 µA added to the 2.5 mA that is already in the resistor will cause the voltage drop on R42 to be 2.513 V. VOUT will be 5.013 V versus the 5.075 V with R42 = 1 k (assuming all other error sources are 0).
The ISEN_A+ and ISEN_A- are differential sense inputs used to sense the DCR drop of an output inductor, the drop across a precision shunt resistor, or as shown here, the IOUT pin of an Infineon power stage. Because it is differential sense, ISEN_A- is connected to a reference voltage above GND.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 29 SW_A is the only output with differential VOUT sense to compensate for any GND plane losses due to the high output current ISENSE AMP Gain Settings Unlike the internal current sense, both OC_WARN and OC_FAULT are based on the output of the LSADC.
Layout Concerns ISENSE FEEDBACK The screen grab below shows the current sense connections for inductior current sensing, on layers 1 and 3, from the output inductor to pins 45 and 46 on the IRPS5401. Figure 31 Current Sense Routing VSENSE FEEDBACK In this screen grab the VSENSE lines on layer 3 are highlighted.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 32 VSENSE on layers 1, 3 VIN Decoupling This screen grab shows that MLCC caps are placed directly aside the TDA21240 to create the shortest loop possible for the current path for the FETs in the power stage.
User guide with DB295 and DB296 demo boards C+D Operation The IRPS5401 can be configured such that SW-C and D can be operated as a single 2 phase output. This is done by selecting ‘Design Tools’ ‘Device Operating Mode’ checking ‘Enable C+D Mode’...
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards MTP Programming Programming a Single Config File Inside the PowIRCenter GUI, choose the ‘Utilities’ Tab (1) and Click on ‘Rocky R2 Device Programmer’ (2). The ‘RockyR2Programmer’ box (3) will pop up and display the number of segments left to be programmed in each section, CNFG, TRIM, USER.
The resistor must be connected from MTP to AGND (pin 50). The resistor must be decoupled with a 10 nF capacitor (X7R type). The IRPS5401 will source 100 µA through the offset resistor for 1 ms immediately after POR, the LSADC will measure the voltage drop on the resistor and the value will be latched into the digital core.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 38 Resistor on MTP pin The PROGMAX register in the CNFG section has a max value of 15, so the table shows 15 possible selections with an offset of +0 to an offset of +14.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards 1. What happens if I program another config file after the .mic file is programmed? ANSWER-The PROGMAX and resistor installed will no longer have any effect on the config file read out of NVM.
Emulated Current Mode Control with Digital P and I IRPS5401 regulates VOUT by modulating the duty cycle (DC) applied to the power stage. The DC needs to vary based on VIN changes and load changes, and to a smaller degree changes in temperature and life. VOUT is compared to Vref (the DAC voltage) by an analog front end that generates an error voltage.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Description of Excel PI Calculator Tool An Excel tool has been created to help determine the Ki and Kp values that should be used in the config file based on the application L, C and switching frequency.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards The ‘Compensator’ Tab contains the settings for Kpwm, KPole, and Fo (crossover frequency) Figure 42 Compensator tab The bode plot will be displayed when the Kp-reg and Ki-reg values are inserted from the calculated values.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Recommended Circuit and Operating Parameters for Internal Switchers from the Data Sheet Figure 44 Bode plot Application Note 34 of 63 V 1.2 2018-12-12...
Efficiency, Power Dissipation, and Temp Rise GUI Efficiency Tool The IRPS5401 GUI has a tool that will estimate the power loss and temp rise. Go to ‘Utilities’ and choose ‘Efficiency Tool’. In the dialog box load in the appropriate VIN, VOUT, L value, L DCR, L core loss, and Switching Frequency.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards The GUI will also display: Figure 47 Percentage of output power contributed by each output Figure 48 Percentage of the total loss contributed by each output Figure 49...
Total Dissipation (IRPS5401 + inductors) 6.26 W System Efficiency including loss of VCC LDO 88.6% The GUI estimates the IRPS5401 efficiency for the same load conditions to be ~88%. The same as the measured efficiency. Application Note 37 of 63 V 1.2...
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Figure 51 Total efficiency curve To determine the power loss of the IRPS5401 (for thermal impedance calculation), the inductor core and winding losses need to be removed from the total power dissipation shown above. Inductor losses calculated from Coiltronic website;...
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Figure 54 Reported junction temperature The thermal image of the entire board shows the PCB in the area of the IRPS5401 is ~60˚C. The thermal impedance from case (and junction) to PCB is (81°C - 60°C) 21°C/5.024W ~ 4°C/W. Application Note 39 of 63 V 1.2...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 55 Thermal image of entire board Application Note 40 of 63 V 1.2 2018-12-12...
LDO. Both boards are configured at the factory to operate with just the 12 V input. The internal LDO is utilized to power the VCC for the IRPS5401 and the gate drive voltage VDRV. The LDO is in TRACKING mode running off of SW-B.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards The TDA2124x powerstages have only 3.3V compatible EN and PWM inputs. DB295 is designed to tie them to 5V signals. For evaluation purposes this has not been a problem. However, in actual designs the datasheet of TDA2124x parts needs to be obeyed.
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 57 DB296 Application Note 43 of 63 V 1.2 2018-12-12...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 58 DB296 schematic – SW-A internal FETs Application Note 44 of 63 V 1.2 2018-12-12...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 59 DB295 schematic – SW-A external FETs Application Note 45 of 63 V 1.2 2018-12-12...
Ground routing: a. If having more than one IRPS5401 in the system ensure that each IRPS5401 has its own AGND only for the components associated with the particular IC. b. AGND has to be connected at a single point to GND (ideally directly at the pin). If a 0 Ohm resistor is being used for the purpose of net separation, position it close to the pin.
5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Typical Performance (Performance data obtained from DB296 and DB295 with IR3555 as PowerStage) SW-A; 1.0 V @ 100 mA SW-B; 1.2 V @ 100 mA 500mV/div, 500 mV/div,...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 60 Start-up SW-A; 1.0 V @ 2 A SW-B; 1.2 V @ 2 A 10 mV/div, 12 mVp-p 10 mV/div, 13 mVp-p Output Filter 1 µH + 7* 22 µF Output Filter 1 µH + 7* 22 µF...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 61 Output ripple Application Note 49 of 63 V 1.2 2018-12-12...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards SW-A; 1.0 V @ 1 A Step SW-B; 1.2 V @ 1 A Step 10m V/div, 1.8% droop 10 mV/div, 1.6% droop Output Filter 1 µH + 7* 22 µF Output Filter 1 µH + 7* 22 µF...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 62 Transient response SW-A; 1.0 V @ 1 A SW-B; 1.2 V @ 1 A Fco = 51 kHz, PM = 59° Fco = 55 kHz, PM = 59°...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Figure 63 Bode plots Application Note 52 of 63 V 1.2 2018-12-12...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards SW-A; 1.0 V @ 2 A SW-B; 1.2 V @ 2 A 2 V/div, Vpeak = 12.6 V 2 V/div, Vpeak = 12.6 V Jitter=11 nsec Jitter = 11 nsec Output Filter 1 µH + 7* 22 µF...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards SW-A; 1.0 V @ 0 A SW-B; 1.2 V @ 0 A 2 V/div, Vpeak = 13.8 V 2 V/div, Vpeak = 14.0 V Jitter = 17 nsec Jitter = 18 nsec Output Filter 1 µH + 7* 22µF...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards EXT SW-A DB295 GREEN = VOUT Figure 66 Output ripple (VIN = 12 V, VOUT = 1 V, Load = 40 A, fsw = 500 kHz) Application Note 55 of 63 V 1.2...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards BLUE = IOUT, GREEN = VOUT Figure 67 Mini slammer 5 A pulse (250 A/µsec) with 20 A DC load, 2kHz, 10% DC Application Note 56 of 63 V 1.2...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards BLUE = IOUT, GREEN = VOUT, CYAN = SW-NODE Figure 68 Load REP RATE = 500 kHz, 50% DC, 500 kHz fsw, 1400 Hz beat frequency Application Note 57 of 63 V 1.2...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Zoom in on MAX Peak to Peak Ripple The SW NODE pulse occurs at the end of the MAX load time BLUE = IOUT, GREEN = VOUT, CYAN = SW-NODE...
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Min peak to peak ripple Efficiency of IRPS5401 + IR3555 IRPS5401 in C+D mode with VOUT_COMMAND = 3.3 V and load set to 8 A. SW_A set to 1 V with 40 A load Total Input Power is 78.48 W. (VIN=11.92*6.55 A+5.00 V*0.082 A) Total Output Power is 66.87 W.
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‘Max Load’ -> Efficiency at maximum load current of 40A ‘no VCC’ -> Efficiency not taking bias for TDA21240 and IRPS5401 into account ‘W/ VCC’ -> System efficiency, taking all losses including bias supply for IRPS5401 and TDA21240 into account Conditions: fsw=800kHz, L=100nH, DCR=0.35mOhm, VCC=5V...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Revision history Document Date of release Description of changes version Initial release 2018-09-10 Schematic updates, restriction removed, chapters 8 and 13 removed 2018-12-11 Schematic updates, board errata for DB295, updated board references to TDA2124x family, adding ‘Design Advisements’...
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5 Output PMIC Controller/ IRPS5401 User guide with DB295 and DB296 demo boards Application Note 62 of 63 V 1.2 2018-12-12...