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6.4.3
Other suggestions to solve EMI issue
Some more suggestions to improve the EMI performance and is listed below.
1. Add capacitor (C
the high ∆V/∆t noise will be reduced and so is the EMI noise. The drawback is more energy will be
dissipated due to slower turn off speed of MOSFET.
2. Add snubber circuit to the output rectifier: Most of the radiated EMI noise comes out from the output
of the system esp. for a system with output cable. Adding snubber circuit (R21 and C23) to the
output rectifier is a more direct way to suppress those EMI noise (refer to Figure 5).
6.5
Tight maximum power control - Propagation delay compensation
The maximum power of the system is changed with the input voltage; higher voltage got higher maximum
power. This is due to the propagation delay of the IC and the different rise time of the primary current under
different input voltage. The propagation delay time is around 200ns. But if the primary current rise time is
faster, the maximum power will increase. The power difference can be as high as >14% between high line
and low line. In order to make the maximum power control become tight, a propagation delay compensation
network is implemented so that the power difference is greatly reduced to best around 2%. Figure 14 shows
the compensation scheme of the IC. The equation (8) explains the rate of change of the current sense
voltage is directly proportional to the input voltage and current sense resistor. For a DCM operation, the
operating range for the dV
more compensation; i.e. lower value of V
dI
dI
V
p
=
⇒
⋅
in
R
sense
dt
L
p
where, I
: primary peak current, V
p
V
: current sense voltage, R
sense
The measured maximum input power for the 12W demo boards at 85Vac and 265Vac shows ±1.71% of
maximum input power. This function is limited to discontinuous conduction mode flyback converter only.
V
1,3
1,25
1,2
1,15
1,1
1,05
1
0,95
0,9
0
0,2
0,4
Figure 14
Propagation delay compensation curve
Application Note
) at the drain source pin: it can slow down the turn off speed of the MOSFET and
ds
/dt is from 0.1 to 0.7. It can show in Figure 14 that higher dV
sense
.
sense
V
dV
p
=
⋅
⇒
in
R
sense
dt
L
p
: input voltage, L
in
: current sense resistor
sense
with compensation
without compensation
0,6
0,8
1
1,2
1,4
dV
Sense
dt
V
=
⋅
sense
in
R
sense
dt
L
p
: primary inductance of the transformer,
p
V
1,6
1,8
2
µ
s
14
ICE3BRXX65J(Z)(G)
/dt will give
sense
(8)
2010-06-20
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