Xilinx Virtex-5 LXT User Manual page 19

Fpga prototype platform
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R
6c. Upstream Interface Connector
The upstream interface connector (P2) is used to configure the DUT in select map or slave-
serial mode
of another prototype platform board.
X-Ref Target - Figure 7
Virtex-5 LXT/SXT/FXT FPGA Prototype Platform
UG229 (v3.0.1) May 21, 2008
(Figure
7). This connector can be sourced by a downstream interface connector
GND
GND
GND
GND
NC
NC
NC
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
INIT
PROG
RW_B
Figure 7: Upstream Interface Connector (44-Pin Female)
www.xilinx.com
Detailed Description
GND
GND
GND
NC
AFX_M2
AFX_M1
AFX_M0
NC
NC
NC
CS_B
DIN
D1
D2
D3
D4
D5
D6
D7
DONE
CCLK
DOUT_BUSY
UG229_07_051506
19

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