Sata Interface Power Management - Western Digital Ultrastar DC HC310 Specifications

9.15

SATA Interface Power Management

The device supports both receiving host-initiated interface power management requests and initiating interface
power management. The device initiates interface power management when the device enters its power saving
mode whose power consumption is lower than Idle mode.
9.15.1 Low PHY Power Conditions Overview
Low PHY power conditions are PHY conditions where the PHY is in a reduced power state (e.g., has disabled
circuitry in order to reduce power). This document defines the amount of power consumed in that low PHY power
condition. The low PHY power conditions include the partial PHY power condition and the slumber PHY power
condition (see section Error! Reference source not found.).
If the partial PHY power condition is enabled and the received IDENTIFY data indicates PARTIAL mode capability,
then the PHY may generate PMREQ_P (PARTIAL) primitive sequences.
If the slumber PHY power condition is enabled and the received IDENTIFY data indicates SLUMBER mode
capability, then the PHY may generate PMREQ_S (SLUMBER) primitive sequences.
If low PHY power conditions are enabled, then the PHY may reply with a PMACK primitive sequence to accept a low
PHY power condition request.
If low PHY power conditions are supported and disabled, then the PHY shall reject a low PHY power condition
request by replying with a PMNAK primitive sequence.
9.15.2 Active PHY Power Condition
While in the active PHY power condition:
a) The PHY is capable of transmitting information and responding to received information; and
b) The PHY may consume more power than while the PHY is in a low PHY power condition.
9.15.3 Partial PHY Power Condition
The interface shall detect the OOB signaling sequence COMWAKE and COMRESET if in the Partial Interface power
management state.
While in the Partial state, the interface shall be subjected to the low-transition density bit pattern (LTDP) sequences;
the interface shall remain in the Partial state until receipt of a valid COMWAKE (or COMRESET) OOB signaling
sequence.
Power dissipation in this Partial state shall be measured or calculated to be less than the PHY Active state, but more
than the Slumber state.
The requirement for a "not-to-exceed" power dissipation limit in the Partial interface power management state is
classified as vendor specific.
9.15.4 Slumber PHY Power Condition
The interface shall detect the OOB signaling sequence COMWAKE and COMRESET if in the Slumber Interface
power management state.
While in the Slumber state, the interface shall be subjected to the low-transition density bit pattern (LTDP)
sequences; the interface shall remain in the Slumber state until receipt of a valid COMWAKE (or COMRESET) OOB
signaling sequence.
Power dissipation in this Slumber state shall be measured or calculated to be less than the PHY Ready state, and
less than the Partial state.
The requirement for a "not-to-exceed" power dissipation limit in the Slumber interface power management state is
classified as vendor specific.
Western Digital Hard Disk Drive OEM Specification
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