Keithley KPCI-PIO32IOA User Manual page 68

Pci bus isolated i/o board
Table of Contents

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A
Address
base
B-3
base, assignment
definition
C-2
Addresses
Interrupt control/status register
PCI general assignments
AIO Panel
starting
5-13
using, in bit tests
AMCC S5933 bus controller
API
definition
C-2
Application program
ISA card port I/O call, using with KPCI-3160
TestPoint or LabVIEW
Application programming interface
definition
C-2
Applications for board, examples
B
Bad board
checking for
5-3,
Base address
B-3
assignment
B-3
Board
bad, checking for
grounding during handling to protect
handling
3-4,
3-10
PCI resource, checking for
returning to Keithley
spare, using in troubleshooting
unwrapping and inspecting
Boards, multiple
problems, checking for
Bus
definition
C-2
memory assignments
B-3
B-4
B-2
5-13
B-7
2-3,
3-2
2-2
5-4
5-3,
5-4
3-4
5-11
5-15
5-3,
5-4
3-5
5-3,
5-4
B-2
Bus controller, AMCC S5933
Bus mastering
definition
Byte
definition
C
Checking
board + DriverLINX installation
resources
Common, digital. See grounding, signal, I/O pin
assignment
Computer requirements. See system requirements
Configuring board + DriverLINX installation
Connections
accessories
B-7
cables
3-10
external circuits
external, checking during troubleshooting
to external circuits
using I/O conditioning
using interface accessories
Connector
expansion slot, troubleshooting
KPCI-3160 I/O
pin assignments
Connectors
board locations
Connectors, I/O
port group assignments
Contact bounce
definition
Control register
bit functions
Conventions, font/typeface
Cross references, using in electronic manual
moving from the point of reference to the
referenced text
returning from the referenced text to the point of
reference
Index
B-2,
B-7
C-2
C-2
3-6
3-5
3-10
3-12
3-12
3-12
3-10
5-3,
5-4
3-8
3-9
3-10
C-2
B-4
1-2
1-3
1-3
3-6
5-3,
5-4
i-1

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