Device Address Register; Table 45: Device Address Register - Silicon Systems SiliconDrive CF SSD-C08G(I)-3150 Datasheet

ATA R
EGISTERS
D A
EVICE DDRESS
The Device Address register is used to maintain compatibility with ATA disk
drive interfaces.
Operation
Read/Write
Default Value
Bit(s) Description
7 Reserved bit.
6 Write Gate (nWTG). Low when a write to the device is in process.
5-2 nHS3 to nHS0. The negated binary address of the currently selected
head.
1 nDS1. Low when drive 1 is selected and active.
0 nDS0. Low when drive 0 is selected and active.
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
3150C-10DSR
R
EGISTER

Table 45: Device Address Register

D D
7 6
- nWTG nHS3 nHS2 nHS1 nHS0 nDS1 nDS0
0 0
S S
ILICON YSTEMS
All unauthorized use and/or reproduction is prohibited.
P
AGE
SSD-C
D D D
5 4 3
1 1 1
P
ROPRIETARY
57
(I)-3150 D S
XXX ATA HEET
D D D
2 1
1 1
F 2, 2009
EBRUARY
0
0