ATA R
EGISTERS
D
C
EVICE
ONTROL
The Device Control register is used to control the interrupt request and issue
ATA software resets.
Operation
Write
Bit(s)
7-4
3
2
1
0
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
3150C-10DSR
R
EGISTER
Table 44: Device Control Register
D
D
7
6
-
-
Description
Reserved bits.
Always set to 1.
Software Reset (SRST). When set, resets the ATA software.
Interrupt Enable (nIEN). When set, device interrupts are disabled.
There is no function in the memory-mapped mode.
Always set to 0.
S
S
ILICON
YSTEMS
All unauthorized use and/or reproduction is prohibited.
SSD-C
D
D
D
5
4
-
-
1
P
ROPRIETARY
P
56
AGE
(I)-3150 D
XXX
ATA
D
D
3
2
1
SRST
nIEN
F
EBRUARY
S
HEET
D
0
0
2, 2009
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