Ata And True Ide Register Decoding; Memory-Mapped Register Decoding; Table 30: Memory-Mapped Register Decoding - Silicon Systems SiliconDrive CF SSD-C08G(I)-3150 Datasheet

ATA T IDE R
AND RUE
ATA T
AND RUE
SiliconDrive can be configured as either a a memory-mapped or an an I/O
devices. As noted earlier, communication to and from the drive is
accomplished using the ATA Command Block.
M -M
EMORY APPED
In memory-mapped mode, the SiliconDrive registers are accessed via
standard memory references (i.e., OE# and WE#). The ATA registers are
mapped to common memory space in a 2KB window starting at address 0.
Reg# Offset A10 A9:A4 A3 A2 A1 A0 OE# = L
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
1 D
1 E
1 F
1 X
1 X
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
3150C-10DSR
D
EGISTER ECODING
IDE R D
EGISTER
R D
EGISTER ECODING

Table 30: Memory-Mapped Register Decoding

0 X 0
0 X 0
0 X 0
0 X 0
0 X 0
0 X 0
0 X 0
0 X 0
0 X 1
0 X 1
0 X 1
0 X 1
0 X 1
1 X X
1 X X
S S
ILICON YSTEMS
All unauthorized use and/or reproduction is prohibited.
SSD-C
ECODING
0 0 0 Even Data
Read
0 0 1 Error
0 1 0 Sector Count
0 1 1 Sector
Number
1 0 0 Cylinder Low
1 0 1 Cylinder High
1 1 0 Drive/Head
1 1 1 Status
0 0 0 Duplicate
Even Data
Read
0 0 1 Duplicate Odd
Data Read
1 0 1 Duplicate
Error
1 1 0 Alternate
Status
1 1 1 Drive Address Reserved
X X 0 Even Data
Read
X X 1 Odd Data
Read
P
ROPRIETARY
P 42
AGE
(I)-3150 D S
XXX ATA HEET
WE# = L
Even Data
Write
Feature
Sector Count
Sector
Number
Cylinder Low
Cylinder High
Drive/Head
Command
Duplicate
Even Data
Write
Duplicate Odd
Data Write
Duplicate
Feature
Device Control
Even Data
Write
Odd Data
Write
F 2, 2009
EBRUARY