Wireless Connectivity Interfaces - Quectel EC21 Series Hardware Design

3.18. Wireless Connectivity Interfaces

EC21 supports a low-power SDIO 3.0 interface for WLAN and a UART/PCM interface for BT.
The following table shows the pin definition of wireless connectivity interfaces.
Table 22: Pin Definition of Wireless Connectivity Interfaces
Pin Name Pin No.
WLAN Part
SDC1_DATA3 129
SDC1_DATA2 130
SDC1_DATA1 131
SDC1_DATA0 132
SDC1_CLK 133
SDC1_CMD 134
WLAN_EN 136
Coexistence and Control Part
PM_ENABLE 127
WAKE_ON_
135
WIRELESS
COEX_UART_RX 137
COEX_UART_TX 138
WLAN_SLP_CLK 118
BT Part*
BT_RTS* 37
BT_TXD* 38
BT_RXD* 39
EC21_Hardware_Design
I/O Description
IO SDIO data bus D3
IO SDIO data bus D2
IO SDIO data bus D1
IO SDIO data bus D0
DO SDIO clock
IO SDIO command
WLAN function control via
DO
FC20 module. Active high.
DO External power control
Wake up the host (EC21 module)
DI
by FC20 module.
DI LTE/WLAN&BT coexistence signal
DO LTE/WLAN&BT coexistence signal
DO WLAN sleep clock
DI BT UART request to send
DO BT UART transmit data
DI BT UART receive data
Confidential / Released
LTE Module Series
EC21 Hardware Design
Comment
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
1.8V power domain
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