Watchdog Timer Trigger Mode Setting: Jp7; Cmos Clear Jumper: Jp5; Power Selection Of Flat Panel Connector (Vddm Of Lcd1 And Lcd2): Jp6 - AXIOMTEK SBC82610 SERIES User Manual

SBC82610 Half-size All-in-One CPU Card Series User's Manual
2.2.1

Watchdog Timer Trigger Mode Setting: JP7

The watchdog timer is an indispensable feature of the SBC82610VE.
It has a sensitive error detection function and a report function. When
the CPU processing comes to a halt, the watchdog either generates a
NMI or resets the CPU.
Options
Short 1-2
NMI
Short 2-3
RESET
Open
Disabled (default)
2.2.2

CMOS Clear Jumper: JP5

Options
Short 2-3
Clear CMOS
Short 1-2
Normal (default)
2.2.3 Power Selection of Flat Panel Connector (VDDM
of LCD1 and LCD2): JP6
VDDM
Short 1-2
5V (default)
Short 2-3
3.3V
SBC82610VE supports +3.3V or +5V flat panel displays. When using
such type of flat panels, configure jumper JP6 to the appropriate
voltage of the flat panel.
8
Setting
1 2
Settings
1 2
Settings
1
2
3
Jumpers and Connectors
3
3