Ai Sample Clock Signal; Ai Sample Clock Timing Options; Routing The Sample Clock To An Output Terminal; Ai Sample Clock Timebase Signal - National Instruments cRIO-904 Series User Manual

• AI Reference Trigger
• AI Pause Trigger
Signals with an * support digital filtering. Refer to the
information.
Refer to the AI Convert Clock Signal Behavior For Analog Input Modules
information about AI Convert Clock signals and the cRIO controller.

AI Sample Clock Signal

A sample consists of one reading from each channel in the AI task. Sample Clock signals the
start of a sample of all analog input channels in the task. The sample clock can be generated
from external or internal sources as shown in the figure below.
Analog Comparison
Event
80 MHz Timebase
20 MHz Timebase
13.1072 MHz Timebase
12.8 MHz Timebase
10 MHz Timebase
100 kHz Timebase

Routing the Sample Clock to an Output Terminal

You can route Sample Clock to any output PFI terminal. Sample Clock is an active high pulse
by default.

AI Sample Clock Timebase Signal

The AI Sample Clock Timebase signal is divided down to provide a source for Sample Clock.
AI Sample Clock Timebase can be generated from external or internal sources. AI Sample
Clock Timebase is not available as an output from the controller.
Signal*
Signal*
Figure 34. AI Sample Clock Timing Options
PFI
Sample Clock
Timebase
PFI Filters
Analog Comparison Event
Ctr n Internal Output
Sigma-Delta Module Internal Output
Programmable
Clock
Divider
cRIO-904x User Manual | © National Instruments | 49
section for more
section for more
PFI
AI Sample
Clock