Single Pulse Measurement; Implicit Buffered Pulse Measurement; Sample Clocked Buffered Pulse Measurement - National Instruments cRIO-904 Series User Manual

Embedded compactrio controller with real-time processor and reconfigurable fpga
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Single Pulse Measurement

Single (on-demand) pulse measurement is equivalent to two single pulse-width measurements
on the high (H) and low (L) ticks of a pulse, as shown in the figure below.
Figure 56. Single (On-Demand) Pulse Measurement
Counter Armed
Gate
Source
Latched
Value

Implicit Buffered Pulse Measurement

In an implicit buffered pulse measurement, on each edge of the Gate signal, the counter stores
the count in the FIFO. The sampled values will be transferred to host memory using a high-
speed data stream.
The counter begins counting when it is armed. The arm usually occurs between edges on the
Gate input but the counting does not start until the desired edge. You can select whether to
read the high pulse or low pulse first using the StartingEdge property in NI-DAQmx.
The figure below shows an example of an implicit buffered pulse measurement.
Counter Armed
Gate
Source
Buffer

Sample Clocked Buffered Pulse Measurement

A sample clocked buffered pulse measurement is similar to single pulse measurement, but a
buffered pulse measurement takes measurements over multiple pulses correlated to a sample
clock.
The counter performs a pulse measurement on the Gate. On each sample clock edge, the
counter stores the high and low ticks in the FIFO of the last pulse to complete. The sampled
values will be transferred to host memory using a high-speed data stream.
The figure below shows an example of a sample clocked buffered pulse measurement.
82 | ni.com | cRIO-904x User Manual
1
2
3
4
5
Figure 57. Implicit Buffered Pulse Measurement
H L
4 2
6
7
1
2
3
4
H L
4 2
4 4
5
6
7
8
9
10
H L
H L
4 2
4 2
4 4
4 4
6 2
6 2
2 2
H L
7 10

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