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3 Terminal Configuration and Functions
3.1
Pin Diagram
Figure 3-1
shows pin names and locations for the CC1020 device.
The CC1020 comes in a QFN 32-type package.
3.2
Pin Configuration
Table 3-1
provides an overview of the CC1020 pinout.
PIN NO.
PIN NAME
—
AGND
1
PCLK
2
PDI
3
PDO
4
DGND
5
DVDD
6
DGND
7
DCLK
8
DIO
9
LOCK
10
XOSC_Q1
11
XOSC_Q2
12
AVDD
13
AVDD
14
LNA_EN
(1) DCLK, DIO and LOCK are high-impedance (3-state) in power down (BIAS_PD = 1 in the MAIN register).
(2) The exposed die attached pad must be soldered to a solid ground plane as this is the main ground connection for the chip.
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32 31 30 29 28 27 26 25
PCLK 1
PDI 2
PDO 3
DGND 4
DVDD 5
DGND 6
DCLK 7
DIO 8
9
10
11
12
Figure 3-1. Package 7-mm × 7-mm VQFNP (Top View)
Table 3-1. Pin Attributes
TYPE
Exposed die attached pad. Must be soldered to a solid ground plane as
Ground (analog)
this is the ground connection for all analog modules. See
more details.
Digital input
Programming clock for SPI configuration interface
Digital input
Programming data input for SPI configuration interface
Digital output
Programming data output for SPI configuration interface
Ground (digital)
Ground connection (0 V) for digital modules and digital I/O
Power (digital)
Power supply (3 V typical) for digital modules and digital I/O
Ground (digital)
Ground connection (0 V) for digital modules (substrate)
Clock for data in both receive and transmit mode.
Digital output
Can be used as receive data output in asynchronous mode
Data input in transmit mode; data output in receive mode.
Digital input/output
Can also be used to start power-up sequencing in receive
PLL Lock indicator, active low. Output is asserted (low) when PLL is in
Digital output
lock. The pin can also be used as a general digital output, or as receive
data output in synchronous NRZ/Manchester mode
Analog input
Crystal oscillator or external clock input
Analog output
Crystal oscillator
Power (analog)
Power supply (3 V typical) for crystal oscillator
Power (analog)
Power supply (3 V typical) for the IF VGA
General digital output. Can be used for controlling an external LNA if
Digital output
higher sensitivity is needed.
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SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015
24
VC
23
AVDD
22
AVDD
21
RF_OUT
20
AVDD
19
RF_IN
18
AVDD
17
R_BIAS
13
14
15
16
AGND
Exposed die
attached pad
(1) (2)
DESCRIPTION
Terminal Configuration and Functions
CC1020
CC1020
Section 6.3
for
5
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