Block Diagram - NEC MuPD754202 Datasheet

2.

BLOCK DIAGRAM

BASIC INTERVAL
TIMER/WATCHDOG
TIMER
INTBT RESET
8-BIT TIMER
PTO0/P30
COUNTER#0
INTT0 TOUT
INTT1
8-BIT
PTO1/P31 TIMER
COUNTER#1
CASCADED
16-BIT
TIMER
8-BIT
COUNTER
TIMER
PTO2/P32
COUNTER#2
INTT2
INT0/P61
INTERRUPT
KRREN
CONTROL
KR4/P70-
4
KR7/P73
SP (8)
CY
ALU
SBS
PROGRAM COUNTER
BANK
GENERAL REG.
PROGRAM MEMORY
DATA MEMORY
(ROM)
(RAM)
2048×8 BITS
128×4 BITS
DECODE
AND
CONTROL
N
f /2
X
CLOCK SYSTEM CLOCK
DIVIDER GENERATOR
X1
µ PD754202, 754202(A)
PORT3 4
PORT6 4
PORT7 4
PORT8 1
BIT SEQ. BUFFER (16)
CPU CLOCK
Φ
STAND BY
CONTROL
X2
IC V
DD
P30-P33
P60-P63
P70-P73
P80
V RESET
SS
7