NEC MuPD754202 Datasheet page 36

(2) Legend in explanation of operation
A : A register; 4-bit accumulator
B : B register
C : C register
D : D register
E : E register
H : H register
L : L register
X : X register
XA : XA register pair; 8-bit accumulator
BC : BC register pair
DE : DE register pair
HL : HL register pair
XA' : XA' extended register pair
BC' : BC' extended register pair
DE' : DE' extended register pair
HL' : HL' extended register pair
PC : Program counter
SP : Stack pointer
CY : Carry flag; bit accumulator
PSW : Program status word
MBE : Memory bank enable flag
RBE : Register bank enable flag
PORTn : Port n (n = 3, 6, 7, 8)
IME : Interrupt master enable flag
IPS : Interrupt priority selection register
IE××× : Interrupt enable flag
RBS : Register bank selection register
MBS : Memory bank selection register
PCC : Processor clock control register
. : Separation between address and bit
: The contents addressed by ××
(××)
××H
: Hexadecimal data
36
µ PD754202, 754202(A)