NEC MuPD754202 Datasheet page 42

Mos integrated circuit, 4-bit single-chip microcontrollers
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Instruction
Mnemonic
Operand
group
Subroutine
CALLA
Note
!addr1
stack control
instructions
Note
CALL
!addr
CALLF
Note
!faddr
RET
Note
RETS
Note
Note
RETI
PUSH
rp
BS
POP
rp
BS
Note The above operations in the shaded boxes can be performed only in the Mk II mode. The other operations
can be performed only in the Mk I mode.
42
Number
Number
of machine
of bytes
cycles
(SP–2) ← ×, ×, MBE, RBE
3
3
(SP–6) (SP–3) (SP–4) ← 0, PC
(SP–5) ← 0, 0, 0, 0
← addr1, SP ← SP–6
PC
10–0
(SP–3) ← MBE, RBE, 0, 0
3
3
(SP–4) (SP–1) (SP–2) ← 0, PC
← addr, SP ← SP–4
PC
10–0
(SP–2) ← ×, ×, MBE, RBE
4
(SP–6) (SP–3) (SP–4) ← 0, PC
(SP–5) ← 0, 0, 0, 0
← addr, SP ← SP–6
PC
10–0
(SP–3) ← MBE, RBE, 0, 0
2
2
(SP–4) (SP–1) (SP–2) ← 0, PC
← 0+faddr, SP ← SP–4
PC
10–0
(SP–2) ← ×, ×, MBE, RBE
3
(SP–6) (SP–3) (SP–4) ← 0, PC
(SP–5) ← 0, 0, 0, 0
← 0+faddr, SP ← SP–6
PC
10–0
← (SP)
1
3
PC
10–0
MBE, RBE, 0, 0 ← (SP+1), SP ← SP+4
×, ×, MBE, RBE ← (SP+4)
0, 0, 0, 0, ← (SP+1)
← (SP)
PC
10–0
2–0
MBE, RBE, 0, 0 ← (SP+1)
1
3+S
← (SP)
PC
10–0
SP ← SP+4
then skip unconditionally
0, 0, 0, 0 ← (SP+1)
← (SP)
PC
10–0
×, ×, MBE, RBE ← (SP+4)
SP ← SP+6
then skip unconditionally
MBE, RBE, 0, 0 ← (SP+1)
1
3
← (SP)
PC
10–0
PSW ← (SP+4) (SP+5), SP ← SP+6
0, 0, 0, 0 ← (SP+1)
← (SP)
PC
10–0
PSW ← (SP+4) (SP+5), SP ← SP+6
(SP–1) (SP–2) ← rp, SP ← SP–2
1
1
(SP–1) ← MBS, (SP–2) ← RBS, SP ← SP–2
2
2
rp ← (SP+1) (SP), SP ← SP+2
1
1
MBS ← (SP+1), RBS ← (SP), SP ← SP+2
2
2
µ PD754202, 754202(A)
Addressing
Operation
area
10–0
10–0
10–0
10–0
10–0
(SP+3) (SP+2)
2–0
(SP+3) (SP+2), SP ← SP+6
(SP+3) (SP+2)
2–0
(SP+3) (SP+2)
2–0
(SP+3) (SP+2)
2–0
(SP+3) (SP+2)
2–0
Skip condition
*11
*6
*9
Unconditional

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