Watchdog Flag (Wdf), Key Return Flag (Krf) - NEC MuPD754202 Datasheet

Mos integrated circuit, 4-bit single-chip microcontrollers
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9.2 Watchdog Flag (WDF), Key Return Flag (KRF)

The WDF is set by a watchdog timer overflow signal, and the KRF is set by a reset signal generated by the
KRn pins. As a result, by checking the contents of WDF and KRF, it is possible to know what kind of reset signal
is generated.
As the WDF and KRF are cleared only by external signal or instruction execution, if once these flags are set,
they are not cleared until an external signal is generated or a clear instruction is executed. Check and clear the
contents of WDF and KRF after reset start operation by executing SKTCLR instruction and so on.
Table 9-2 lists the contents of WDF and KRF corresponding to each signal. Figure 9-3 shows the WDF operation
in generating each signal, and Figure 9-4 shows the KRF operation in generating each signal.
Table 9-2. WDF and KRF Contents Correspond to Each Signal
Hardware
Watchdog flag (WDF)
Key return flag (KRF)
Reset signal generation by
watchdog timer overflow
WDF
External RESET
Operation mode
Operation mode
32
External RESET
Reset signal
signal generation
generation by watch- generation by the
dog timer overflow
0
1
0
Hold
Figure 9-3. WDF Operation in Generating Each Signal
External RESET
signal generation
HALT
Operation
mode
mode
Internal reset operation
µ PD754202, 754202(A)
Reset signal
WDF clear
instruction
KRn input
execution
Hold
1
Reset signal generation by
watchdog timer overflow
HALT
Operation
mode
mode
Internal reset operation
Internal reset operation
KRF clear
instruction
execution
0
Hold
Hold
0
WDF clear
instruction
execution
HALT
mode
Operation mode

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