Lattice Semiconductor ASC Bridge Board User Manual page 3

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ASC Bridge Board
Evaluation Board User Guide
Tables
Table 5.1. ASC0 ASCCLK Jumper Setting ............................................................................................................................... 7
Table 8.1. J6 D-SUB 25 Connection ....................................................................................................................................... 8
Table 8.2. J13 D-SUB 25 Connection ..................................................................................................................................... 9
Table 8.3. J7 D-SUB 25 Connection ..................................................................................................................................... 10
Table 10.1. Fan 1 Header Connection ................................................................................................................................. 12
Table 11.1. Fan 2 Header Connection ................................................................................................................................. 12
Table 12.1. Fan 3 Header Connection ................................................................................................................................. 12
Table 13.1. Momentary Push-Buttons ................................................................................................................................ 13
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02025-2.0
3

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