J16 Fan 1 Header; J21 Fan 2 Header; J19 Fan 3 Header; Table 10.1. Fan 1 Header Connection - Lattice Semiconductor ASC Bridge Board User Manual

ASC Bridge Board
Evaluation Board User Guide

10. J16 Fan 1 Header

This fan connector supports either a 3-wire low-side drive fan or 4-wire fan.

Table 10.1. Fan 1 Header Connection

J16 Pin Description
Number
1 GND
2 PWM Switch to GND
3 PWM
4 Fan Tachometer
5 +5 V
6 +12 V
*Note: J16 pin 2 is buffered and inverted from the signal FAN1_PWM. See
for additional details.

11. J21 Fan 2 Header

This fan connector supports a 3-wire low-side drive fan. The power pin on this connector is selectable between 5 V and
12 V through jumper J20. Shorting the jumper to the 1-2 location selects the 12 V option. The 5 V option is selected
when the jumper in on the 2-3 location.

Table 11.1. Fan 2 Header Connection

J21 Pin Description
Number
1 PWM Switch to GND
2 Fan Power
3 Fan Tachometer
*Note: J21 pin 1 is buffered and inverted from the signal FAN2_PWM.
section for additional details.

12. J19 Fan 3 Header

This fan connector supports a 3-wire high side drive fan. The power for this fan connector is selectable between 5 V
and 12 V through jumper J17. Shorting the jumper to the 1-2 location selects the 12 V option. The 5 V option is selected
when the jumper in on the 2-3 location. A hold-up capacitor is inserted in parallel with the fan to guarantee proper
under speed detection. The ASC Bridge Board has a set of pre-populated capacitors connected through jumper J18. For
fan PWM frequency less than 10 kHz, connect J18 to the 1-2 location. Connect J18 to the 2-3 location for fan PWM
frequency between 10 kHz to 26.7 kHz. If the fan PWM frequency is greater than 40 kHz, leave J18 unconnected. For
more information about fan control, please refer to TN1278, Temperature Monitoring and Fan Control with Platform
Manager 2.

Table 12.1. Fan 3 Header Connection

J19 Pin Description
Number
1 GND
2 PWM Switch to Power
3 Fan Tachometer
*Note: J19 pin 2 is buffered from the signal FAN3_PWM. See
details.
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12
MachXO3-9400
Ball Pad
––
*
G15 PT42D
G15 PT42D
G12 PT28A
––
––
MachXO3-9400
Ball
*
G15
––
F15
MachXO3-9400
Ball Pad
––
*
E16 PT40C
E13 PT28C
Figure A.4
ECP5-45
Ball
––
C7
C7
C6
––
––
Figure A.4 in the Appendix A. Board Schematics
ECP5-45
Pad Ball Pad
PT42D D8 PT13B
––
PT42C E8 PT13A
See Figure A.4 in the Appendix A. Board Schematics
ECP5-45
Ball Pad
––
B8 PT15B
C8 PT15A
in the Appendix A. Board Schematics
FPGA Board
Signal Name
Pad
––
PT11B EXPCON_IO44
PT11B EXPCON_IO44
PT11A EXPCON_IO45
––
––
section
FPGA Board
Signal Name
EXPCON_IO42
––
EXPCON_IO43
FPGA Board
Signal Name
––
EXPCON_IO40
EXPCON_IO41
section for additional
FPGA-EB-02025-2.0