Terasic DE5A-Net User Manual
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Terasic DE5A-Net User Manual

Opencl
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DE5a-Net OpenCL
1
www.terasic.com
March 29, 2017

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Summary of Contents for Terasic DE5A-Net

  • Page 1 DE5a-Net OpenCL www.terasic.com March 29, 2017...

  • Page 2: Table Of Contents

    CONTENTS DE5A-NET OPENCL CHAPTER 1 .......................... 3 1.1 S ............................3 YSTEM EQUIREMENT 1.2 O CL A ............................4 RCHITECTURE OPENCL FOR WINDOWS CHAPTER 2 ........................ 5 2.1 S ............................5 OFTWARE NSTALLATION 2.2 O CL L ..........................7 ICENSE NSTALLATION 2.3 C...

  • Page 3: De5A-Net Opencl

    DE5a-Net board, and how to compile and execute the example projects for DE5a-Net. Note that OpenCL coding instruction is not in the scope of this document, but the user can refer to Altera SDK for OpenCL Programming Guide for more details.

  • Page 4: Open Cl Architecture

    1-1. OpenCL kernel is compiled with Intel FPGA OpenCL compiler provided by the Altera OpenCL SDK. The Host Program is compiled by Visual Studio C/C++ in Windows or GCC on Linux. Figure 1-1 Intel FPGA OpenCL Architecture DE5a-Net OpenCL www.terasic.com March 29, 2017...

  • Page 5: Opencl For Windows

    OpenCL for Windows This chapter describes how to set up DE5a-Net OpenCL development environment on 64-bit Windows, and how to compile and test the OpenCL examples for DE5a-Net. For more details about Intel FPGA OpenCL started guide, please refer to: https://www.altera.com/en_US/pdfs/literature/hb/opencl-sdk/aocl_getting_started.pdf...
  • Page 6  DE5a-Net OpenCL BSP (Board Support Package) After Quartus II and OpenCL SDK are installed, download the DE5ANET_E1_OpenCL_BSP _16.1.zip DE5a-Net windows BSP for Intel FPGA OpenCL 16.1 from the web: http://de5a-net.terasic.com/cd Then, decompress DE5ANET_E1_OpenCL_BSP_16.1.zip to the “de5a_net_e1” folder under the folder “C:\intelFPGA_pro\16.1\hld\board”, as shown in...

  • Page 7: Open Cl License Installation

    An OpenCL license is required for Intel FPGA OpenCL SDK to compile any OpenCL projects successfully. Developers can purchase the OpenCL license from either Altera or Terasic. Assuming that developers have obtained a license file with the filename “license.dat”, and it is saved in the local disk with the file path such as “c:\license.dat”.

  • Page 8: Configure

    Figure 2-3 Setup LM_LICENSE_FILE Environment Variable For Intel FPGA OpenCL SDK to be able to find the kit location of DE5a-Net correctly, developers need to create an environment variable AOCL_BOARD_PACKAGE_ROOT, and set its value as: “%ALTERAOCLSDKROOT%\board\de5a_net_e1” Also, append "%AOCL_BOARD_PACKAGE_ROOT%\windows64\bin" and "%ALTERAO CLSDKROOT%\bin"...
  • Page 9 Systems Variable section and click the Edit button as shown in Figure 2-5. In the Edit dialog, Append “%AOCL_BOARD_PACKAGE_ROOT%\windows64\bin; %ALTERAOCLSDKROOT%\bin; %ALTERAOCLSDKROOT%\windows64\bin; C:\intelFPGA_pro\16.1\qsys\bin” into the Variable value edit box. Note, each different directory should be separated with a semicolon as shown in Figure 2-6. DE5a-Net OpenCL www.terasic.com March 29, 2017...
  • Page 10 Figure 2-5 Select “Path” and click “Edit” bottom Figure 2-6 Edit PATH environment variable In Command Prompt window, type “aocl install” to install PCI Express driver. Note that users need to have administrator privileges to install the driver. DE5a-Net OpenCL www.terasic.com March 29, 2017...

  • Page 11: Board Setup

    Before testing OpenCL on DE5a-Net, please follow the below procedures to set up DE5a-Net board on your PC as shown in Figure 2-7. Make sure your PC is powered off. Insert DE5a-Net board into PCI Express x8 or x16 slot.

  • Page 12: Open Cl Environment Verify And Flash C V P

    OpenCL project folder. Then type “aocl flash aclde5a_net0 hello_world.aocx” to write hello_world.aocx OpenCL image onto the startup configuration flash of DE5a-Net. Before flash programming, the programmer will ask users which startup configuration image area will be used as shown in Figure 2-9.
  • Page 13 To make sure a correct image is used when FPGA boots up, please make sure the dip switch SW3.4 on DE5a-Net is changed to the correct location. If a User Image area is selected, the dip switch SW3.4 on the DE5a-Net should be moved to Up position as shown in...
  • Page 14 PC and DE5a-Net board, then turn it back on.  Test „aocl diagnose‟ Command The diagnose utility in the Arria 10 DE5a-Net board reports device information and identifies issues. The diagnose utility first verifies the installation of the kernel driver and returns the overall information of all the devices installed in a host machine.
  • Page 15 Note: For DE5a-Net to negotiate with the host PC at Gen 3 as the link speed, it is strongly recommended that users set the PCIe speed at Gen 3 in the BIOS on the host PC. If your PC support PCIe Gen3x8, but it gets incorrect detected information, you can modify the PCIe settings in the BIOS, and reboot.

  • Page 16: Compile And Test Open Cl Project

    This section will show how to compile and test OpenCL kernel and OpenCL Host Program for the vector_add project. Developers can use the same procedures to compile and test other OpenCL examples for DE5a-Net.  Compile OpenCL Kernel The utility aoc (Altera SDK for OpenCL Kernel Compiler) is used to compile OpenCL ker nel.
  • Page 17 “BUILDBuild Solution” to build host program. When build is successfully, you will see successful message as show in Figure 2-15. The execute file is generate in: “C:\intelFPGA_pro\16.1\hld\board\de5a_net_e1\tests\vector_add\bin\host.exe” Figure 2-15 Message for vector_add Host Program build successfully DE5a-Net OpenCL www.terasic.com March 29, 2017...
  • Page 18 Figure 2-16. Figure 2-16 “aocl program aclde5a_net0 vector_add.aocx” configured successfully In Command Prompt window, execute “host.exe”. Figure 2-17 is the screen shot when the test is successful. Figure 2-17 “vector_add” test successfully DE5a-Net OpenCL www.terasic.com March 29, 2017...

  • Page 19: Opencl For Linux

    This chapter describe how to setup DE5a-Net OpenCL development environment on 64-bit Linux (Red Hat Enterprise Linux 6.5/CentOS 7.0 are recommended), and how to compile and test the OpenCL examples for DE5a-Net. For more details about Altera OpenCL , please refer to Altera SDK for OpenCL Getting Started document: https://www.altera.com/en_US/pdfs/literature/hb/opencl-sdk/aocl_getting_started.pdf...
  • Page 20 Quartus II software uses the built-in USB-Blaster II drivers on Linux to access USB-Blaster II download cable on DE5a-Net. but after installed the Quartus II software with built-in drivers, User need to change the port permission for USB-Blaster II via issuing DE5a-Net OpenCL www.terasic.com...
  • Page 21 You must also have sudo or root privileges.  DE5a-Net openCL BSP (Board Support Package) After Quartus II and OpenCL SDK are installed, please download the DE5ANET_E1_Open CL_BSP_16.1.tar.gz DE5a-Net linux BSP for Altera OpenCL 16.1 from the web: http://de5a-net.terasic.com/cd Then, decompress DE5ANET_E1_OpenCL_BSP_16.1.tar.gz to the “de5a_net_e1” folder under the folder "/root/intelFPGA_pro/16.1/hld/board", where assumed Quartus II is installed on the...

  • Page 22: Open Cl License Installation

    .cshrc or Bash Resource file (.bashrc) in your directory, you must set the ALTERAOCLSDKROOT and PATH environment variables manually. And for Altera OpenCL SDK able to find the kit location of DE5a-Net correctly, the developers need to create an DE5a-Net OpenCL www.terasic.com...

  • Page 23: Board Setup

    1. Make sure your PC is power off. 2. Insert DE5a-Net board into PCI Express x8 or x16 slot. 3. Connect PC‟s 12V PCI Express 6-pin power to the DE5a-Net source (if there‟s not, ignore this step) 4. Connector PC‟s USB port to DE5a-Net mini USB port using an USB cable.

  • Page 24: Open Cl Environment Verify And Flash C V P

    Figure 3-4 Setup DE5a-Net board on PC This section will show how to make sure the OpenCL environment is setup correctly. Firstly, please open the Linux system terminal window by right click the Mouse on system desktop, then clicking on Open Terminal.
  • Page 25 Then type “aocl install” to load the PCIe driver for the DE5a-Net as shown in Figure 3-6. Figure 3-6 driver installation Note: if user don‟t using the recommended Linux system or different version, recompile the driver is needed. You can compile it by typing “cd root/intelFPGA_pro/16.1/hld/board/de5a_net_e1/ linux64/driver”...
  • Page 26 To make sure correct image is used when FPGA boot, please make sure the dip switch SW3.4 on DE5a-Net is located at correct location. If User Image area is selected, the dip switch SW3.4 on the DE5a-Net should be move to up position as shown in Figure 3-9.
  • Page 27 PC and DE5a-Net board, then turn it back on.  Test „aocl diagnose‟ Command The diagnose utility in the Arria 10 DE5a-Net board reports device information and identifies issues. The diagnose utility first verifies the installation of the kernel driver and returns the overall information of all the devices installed in a host machine.

  • Page 28: Compile And Test Open Cl Project

    Note: For DE5a-Net to negotiate with the host PC at Gen 3 as the link speed, it is strongly recommended that users set the PCIe speed at Gen 3 in the BIOS on the host PC. If your PC support PCIe Gen3x8, but detected is incorrect, you can modify the PCIe settings in the BIOS, and reboot.
  • Page 29 “make” to compile the host program. When build is successfully, you will see successful message as show in Figure 3-12. The execute file is generate in the same directory which named bin. DE5a-Net OpenCL www.terasic.com March 29, 2017...
  • Page 30 FPGA with the OpenCL Image vector_add.aocx. Then, launch the compiled Host Program to start vector_add execute file for test. In the terminal type “./host”. Figure 3-13 shows the execution is successful. Figure 3-13 successful Message for “vector_add” test DE5a-Net OpenCL www.terasic.com March 29, 2017...

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