Motorola Semiconductor MC68HC11F1 Technical Manual page 39

CSCTL — Chip-Select Control
Bit 7
IO1EN IO1PL
RESET: 0
* PCSEN is set out of reset in expanded modes and cleared in single-chip modes.
IO1EN — I/O Chip-Select 1 Enable
0 = CSIO1 disabled
1 = CSIO1 enabled
IO1PL — I/O Chip-Select 1 Polarity
0 = CSIO1 active low
1 = CSIO1 active high
IO1EN — I/O Chip-Select 2 Enable
0 = CSIO2 disabled
1 = CSIO2 enabled
IO2PL — I/O Chip-Select 2 Polarity
0 = CSIO2 active low
1 = CSIO2 active high
GCSPR — General-Purpose Chip-Select Priority
0 = Program chip-select has priority over general-purpose chip-select
1 = General-purpose chip-select has priority over program chip-select
Refer to Table 17.
On-Chip Registers
On-Chip RAM
Bootloader ROM
On-Chip EEPROM
I/O Chip Selects
Program Chip Select
General-Purpose Chip Select
NOTES:
1. EEPROM is present on the MC68HC11F1 only.
MC68HC11F1/FC0
MC68HC11FTS/D
Table 16 Chip Select Clock Stretch Control
Clock Stretch
Bits A, B
0 0
0 1
1 0
1 1
6 5 4
IO2EN IO2PL
0 0 0
Table 17 Chip Select Priorities
GCSPR = 0
1
Clock Stretch
0 Cycles
1 Cycle
2 Cycles
3 Cycles
3 2
GCSPR PCSEN* PSIZA
0 —
GCSPR = 1
On-Chip Registers
On-Chip RAM
Bootloader ROM
1
On-Chip EEPROM
I/O Chip Selects
General-Purpose Chip Select
Program Chip Select
$x05D
1 Bit 0
PSIZB
0 0
MOTOROLA
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