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INIT — RAM and I/O Mapping (MC68HC11F1 only)
Bit 7
RAM3
RAM2
RESET:
0
The INIT register can be written only once in first 64 cycles out of reset in normal modes, or at any time
in special modes.
The register diagram above applies to the MC68HC11F1 only. A diagram and bit
descriptions of the INIT register in the MC68HC11FC0 are provided elsewhere in
this section.
RAM[3:0] — Internal RAM Map Position
These bits determine the upper four bits of the RAM address and allow mapping of the RAM to any four-
Kbyte boundary. Refer to Table 10.
REG[3:0] — 96-Byte Register Block Map Position
These bits determine bits the upper 4 bits of the register block and allow mapping of the register block
to any four-Kbyte boundary. Refer to Table 10.
RAM[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
OPT2 — System Configuration Option Register 2
Bit 7
GWOM
CWOM
RESET
0
GWOM — Port G Wired-OR Mode Option
Refer to 7.8 Parallel I/O Registers, page 36.
MOTOROLA
22
6
5
4
RAM1
RAM0
0
0
0
NOTE
Table 10 RAM and Register Mapping
Location
$0000-$03FF
$1000-$13FF
$2000-$23FF
$3000-$33FF
$4000-$43FF
$5000-$53FF
$6000-$63FF
$7000-$73FF
$8000-$83FF
$9000-$93FF
$A000-$A3FF
$B000-$B3FF
$C000-$C3FF
$D000-$D3FF
$E000-$E3FF
$F000-$F3FF
6
5
4
CLK4X
LIRDV
0
1
0
3
2
1
REG3
REG4
REG1
0
0
0
REG[3:0]
Location
0000
$0000-$005F
0001
$1000-$105F
0010
$2000-$205F
0011
$3000-$305F
0100
$4000-$405F
0101
$5000-$505F
0110
$6000-$605F
0111
$7000-$705F
1000
$8000-$805F
1001
$9000-$905F
1010
$A000-$A05F
1011
$B000-$B05F
1100
$C000-$C05F
1101
$D000-$D05F
1110
$E000-$E05F
1111
$F000-$F05F
3
2
1
—
SPRBYP
—
0
0
0
$x03D
Bit 0
REG0
1
$x038
Bit 0
—
0
MC68HC11F1/FC0
MC68HC11FTS/D
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