Analog Devices EVAL-ADAS3022EDZ User Manual

One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for the

FEATURES

Full-featured evaluation board for the
Versatile analog signal conditioning circuitry
On-board reference, clock oscillator, and buffers
Converter evaluation and development board (EVAL-CED1Z)
compatible
PC software for control and data analysis (time and
frequency domain)

KIT CONTENTS

EVAL-ADAS3022EDZ evaluation board

ADDITIONAL EQUIPMENT NEEDED

EVAL-CED1Z board
Precision signal source
World-compatible 7 V dc supply (enclosed with EVAL-CED1Z)
USB cable

EVALUATION BOARD DESCRIPTION

The EVAL-ADAS3022EDZ is an evaluation board for the
ADAS3022 16-bit data acquisition system (DAS). This device
integrates an 8-channel multiplexer, a high impedance
programmable gain instrumentation amplifier (PGIA) stage with
a high common-mode rejection, a precision 16-bit successive
ANALOG
INPUTS
ADAS3022
1 MSPS Data Acquisition System
ADAS3022
ADAS3022
PROTOTYPE AREA
POWER SERIAL
INTERFACE
Figure 1. EVAL-ADAS3022EDZ
Rev. A | Page 1 of 32
EVAL-ADAS3022EDZ User Guide
16-Bit, 8-Channel,
approximation (no latency) analog-to-digital converter and
precision 4.096 V reference offering an aggregate throughput
of 1 million samples per second (1 MSPS).
The evaluation board is designed to demonstrate the perform-
ance of the ADAS3022 and to provide an easy-to-understand
interface for a variety of system applications. A full description
of this product is available in the data sheet and should be
consulted when utilizing this evaluation board.
The evaluation board is intended to be used with the Analog
Devices, Inc., converter evaluation and development (CED)
board, EVAL-CED1Z, a USB-based capture board connected
to P4, the 96-pin interface.
On-board components include a high precision, buffered band
gap 4.096 V reference (ADR434), reference buffers (AD8032),
passive signal conditioning circuitry, and an FPGA for deserializing
the serial conversion results and configuring the
a 4-wire serial interface.
The P3 connector allows users to test their own interface with
or without the optional Altera FPGA, U6 (programmed using
the P2 and passive serial EEPROM, U5).
FPGA
PROGRAMMING
PORT
40-PIN IDC
Evaluation Board
UG-484
ADAS3022
FPGA
96-PIN
INTERFACE
via