Troubleshooting - Tektronix TDS3012C User Manual

Bottom Side
Define State Input Source
Inputs
Logic
Clock Input Source
Slope
Trigger
Goes True
When
Goes False
Thresholds Level (State
Input)N
Level (Clock Input)
N
Set to TTL
Set to ECL
Set to 50%
Mode &
Holdoff
Key Points
Trigger When.
the clock transition in order for the oscilloscope to detect the state.
Pulse Triggers
Pulse Width Trigger.
when a signal pulse width is less than, greater than, equal to, or not
equal to a specified pulse width. This trigger is useful for digital logic

troubleshooting.

TDS3000C Series Oscilloscope User Manual
Description
Sets the state signal source.
Sets the signal logic for state input source.
H = high true, L = low true.
Sets the clock signal source.
Sets the signal slope (rising or falling) for clock
input. The clock slope defines when the clock
signal is true.
Triggers the oscilloscope if the state signal is
true when the clock signal slope is true.
Triggers the oscilloscope if the state signal is
false when the clock signal slope is true.
Sets the threshold voltage level for state and
clock signals to level N, using the general
purpose knob.
Sets the threshold voltage level to 1.4 V for
both inputs.
Sets the threshold voltage level to -1.3 V for
both inputs.
Sets the threshold voltage level to 50% of each
input's peak-to-peak value.
The table on Edge triggering includes a
description of this menu item. (See page 114.)
The state signal must be true or false for ≥2 ns prior to
Pulse-width triggering triggers the oscilloscope
Reference
123