Aaeon SBC-598 Manual page 25

JP1 allows users to clear CMOS data.
Normal (Default)
1 2 3
Enable (Default)
2 4 6
1 3 5
The SBC-598 supports 5V DRAM and 3.3V DRAM. Set JP3 to
match the DRAM voltage type.
3.3V
8
6
4
2
7
5
3
1
Clear CMOS
1 2 3
Disable
2 4 6
1 3 5
5V (Default)
8 7
6 5
4 3
2 1
Chapter 2 Installation 17