Keysight Technologies E8257D Service Manual page 151

A6 Frac-N (Fine Tune)
H_FM_INV MOD_CONTROL
Z o
FM
H_SD_FM
1 MHz PM
L_SD_OFF
FM_OUT_
L_FM_OFF 0.1 MHz PM
BAND_
DAC
7 9
Control 5
2
FM_OFF_H
Frac-N Sweep Start / Stop (to / from A9)
Prescaler
Control
Atten & 3 16
Offset Mod 5
16
Reclocked
FM_IN_BAND_DAC
FM VCO/N
Data I/O
FM_IN_BAND_OFFSET_DAC
7
5 MHz
Reference Phase Loop Filter &
Divider /2 Detector
GAIN_CONTROL_DAC
7
Reference Input
10 MHz TCXO
Out of lock
Detector
FM Input
from A11 Pulse / Analog
Modulation Generator
A7 Reference (Option UNR/UNX & Instruments
with Serial Prefix >US4805/MY4805)
A32 10 MHz
Crystal Oscillator
10 MHz
Ext
10 MHz
10 MHz
In
x 10
100 MHz
100 MHz
500 MHz 500 MHz
x 5 x 2
Note: This drawing shows the A7 Reference (Option UNR).
Both the A7 Reference (Standard) and the A7 Reference (Option UNR)
have the same input and output signals.
57n-67d_ref_synth-loop
Lowband
Frec-N to / from
Divide
J1
3.2-10GHz
from
A29 Doubler
10MHz
Fixed
Divider
ATTEN_ Programable
Divider
CONTROL
YTO_FM
Source Settled
Indicators
SOURCE_SETTLED_H
L_RST
L_WIDELBW
Control
L_POS_PHASE_INCR
STRB
Sweep_YIG Driver
Prescaler
10 dB
VCO
FM
VCO
Tune
500-1000 MHz
Lead-Lag
12 dB
EE_POT_
CONTROL
3 RF
Power
Detector
to
L_Out_of_Lock
Analog Bus
VCO Out
10 MHz to
A6 Frac-N
A31 Motherboard
Ext
10 MHz
10 MHz
Out
10 MHz Digital Out
10 MHz
Digital Out to
A11 Pulse / Analog
Modulation Generator
1 GHz-OUT_LOWBAND
ON / OFF
I
1 GHz
1 GHz 50 MHz
Output to
A8 Output
1 GHz
1 GHz 1 GHz
Output to
A5 Sampler
A9 YIG Driver
Sweep Start / Stop
A6
Retrace (Rear Pnl)
Z-axis / Blanking (Rear Pnl)
Sweep Control
Stop Sweep (Rear Pnl)
Sweep Level (to A10)
Programmerable
Sweep Out
Sweep_DAC
Ref Counter
Rear Panel
(0-10v)
Programmerable
Sweep_DAC
Counter
3.2-10V
+32 V
Delay_Coupler DAC
(cw)
sweep=
0V 100Hz
YIG Pre-tune DAC
(cw)
Ramp
Sweep
230
Pretune
H_Speedup Enable
Speedup
2k
J4
230: :1k
from A5
: :
FM_FREQ_COMP_L
J9
Ramp Swp FM_GAIN_DAC FM_FREQ_COMP
from A6
FM_FREQ_COMP_H
J3
from A6
FM_ATTEN_L
FM_ATTEN
FM_ATTEN_H
A5 Sampler / YO Loop (Coarse Tune)
LFNSWP
J1 1 GHz In
J6 500 - 1000 MHz +5dBm
Frac-N
In
750 MHz
1 GHz RF
J1 1 GHz In
4
250 MHz LO
HIGH_LOW
MULTR LATCH
STROBE
MULTR
H_PRESET_EN
6 L CRS PLL
+/- 1
I
M
750 MHz C Unlock
x ----
f
Detector
256
155 MHz
Mixer IF
12 to 155 MHz
750 MHz 900 MHz
LO RF
750 MHz B
Block Diagram for the E8257N Generator, Sweep Reference / Synthesis Loop, Service Guide E8251-90014
A29 20 GHz Doubler
J3 3-10
to A6 Frac-N
3.2 - 10 GHz
> -7 dBm
J1
3-10
3-10
A28 YIG
5-10
X2
Main
Doubler
Coil
YIG
> 3.2-10 GHz
> + 11 dBm
J1
J4 to A5 Sampler
3.2 - 10 GHz
FM
> -7 dBm
Coil
LYO Loop Hold 1
800k
:
:4k
A39
Coupler
2-20 GHz
(44 GHz
Models)
V_GHZ_DAC
Mode A
2 P H_PRESET_EN
14 dB
YOLGAIN
1 - Shot
STROBE
0.2 ms
RF
Mode B
FM MODE
1 - Shot
LO
& MULTR
4 1.0 ms
STROBE
FM_MODE_A_B
(from YO Driver) LYOSLEW
FNDIV
f
IF
I
f
L_CRSPLL_Pretune
YOLGAIN
1- Shot
+15V
Sampler IF
30 to 64 MHz
UNLK
f
S
618 to 905 MHz
VCO
_
Vtune
+
3-10
750 MHz
3-20
10-13
Limiter
10-20
J2
>3.2 - 20 GHz
16-20
13-16
FM_OFF_H SOURCE_SETTLED_H
L_YOPLL_OPEN YO_PREDAC
L_YOPLL_PRESET
(from FRAC-N) LFNSWP
L_HOLD
L_YOL_UNLK
YO PLL
Unlock
Detector
A Bus
YO
Phase-
lock
80 MHz _
+
900 MHz
LO RF
S
f f
S YO