Block Switching Instruction (Brset) - Mitsubishi Electric MELSEC-Q Series Programming Manual

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Block switching instruction (BRSET)

QCPU
Programmable controller CPU
Basic
High Performance
*1 The serial number (first five digits) shall be 13102 or later.
Usable Devices
Internal device
File
(System, User)
Register
R
Bit
Word
(s)
Data Type
Programs Using Instructions
Sequence
Program
(s)
BIN16
Function
• Switches the target block number of the SFC control instruction that specifies only a step (Sn) and transition condition
(TRn) to the number set for the device designated by (s).
• Although "BLm\Sn" or "BLm/TRn" may be used as the instruction device when designating the destination block number,
only a constant (K, H) may be designated at the "m" of "BLm", thereby fixing the designation destination. When block
switching is executed by this BRSET instruction, a word device can be used for indirect designation, index modification, etc.
• The effective operation range when block switching occurs (by BRSET instruction) varies according to the program being
run at the time, as shown below.
When this instruction is executed in a sequence program, target block switching is valid from instruction execution to SFC
execution.
At the next scan, the target block is block 0 as the default until the instruction is executed again.
If the BRSET instruction is executed at an SFC program, block switching will be effective only for the step currently being
executed.
Even if the step in question is the same step, the BRSET instruction must be executed at each block where the Sn and TRn
instructions are used.
Moreover, within a single step, block switching will be effective from the point where the BRSET instruction is executed to that
step's processing END point.
When processing is repeated at the next scan following the processing END for that step, the block in question will be
designated as the "current block" until the point when the BRSET instruction is executed again.
Process CPU
Universal
*1
Link Direct J\
Intelligent
Function
Module
U\G
Bit
Word
SFC Program
Step
Transition
Condition
4.4 Controlling SFC Programs by Instructions (SFC Control Instructions)
LCPU
Redundant CPU
Index Z
Constant
Expansion
K, H
SFC
Execution Site
Block
Step
4 SFC PROGRAM CONFIGURATION
Other
4
Transition
Condition
103

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