Mitsubishi Electric MELSEC-Q Series Programming Manual page 75

Name Instruction Expression
*1
Step END rSn
instruction
rBLm\Sn
*2
SCHG (d)
*1
Transition control sTRn
instruction
sBLm\TRn
*1
rTRn
rBLm\TRn
Block switching BRSET (s)
instruction
: Usable, : Unusable
*1 In a sequence program, block 0 is the instruction execution target block.
In an SFC program, the current block is the instruction execution target block.
The instruction execution target block can be changed with the block switching instruction (BRSET).
Note, however, that the following CPU modules cannot use the BRSET instruction.
Basic model QCPU
Universal model QCPU whose serial number (first five digits) is "13101" or earlier
LCPU
*2 Can be used at the step of an SFC program.
An error occurs if it is executed in a sequence program other than an SFC program.
*3 The Universal model QCPU whose serial number (first five digits) is "13102" or later can execute this instruction.
• Either of the following errors occurs if the SFC control instruction is executed from the sequence program
when the special relay for SFC program start/stop (SM321) is OFF.
Instruction that specifies a block: BLOCK EXE. ERROR (error No.: 4621)
Instruction that specifies a step: STEP EXE. ERROR (error No.: 4631)
• Do not use the SFC control instructions in interrupt programs or fixed scan execution type programs. If
used, operation of the SFC program cannot be guaranteed.
• The following instructions are described as follows when used in the format other than the MELSAP-L.
s: SET
r: RST
Index modification of SFC block (BL) and step relay (S)
The SFC block (BL) and step relay (S) in the High-speed Universal model QCPU can be index-modified within the following
range. Note that the range will be S0 to S511 when the step relay (S) in SFC blocks is index-modified.
• BL0 to BL319 for the SFC block (BL)
• Range that is set in the Device tab of the PLC parameter dialog box for the step relay (S)
Function
A specified step in a specified block
is forcibly ended (deactivated).
The instruction execution step is
deactivated, and a specified step is
activated.
A specified transition condition at a
specified block is forcibly satisfied.
The forced transition at a specified
transition condition in a specified
block is canceled.
Blocks subject to the "*1" SFC
control instruction are designated.
4.4 Controlling SFC Programs by Instructions (SFC Control Instructions)
CPU Module Type
Basic High
model Performance
QCPU Model QCPU,
Process CPU,
Redundant
CPU
 
 
 
 
 
4 SFC PROGRAM CONFIGURATION
Universal
model
QCPU,
LCPU



4

*3

73