Audio Streaming Sample; Operation; Pcm Data Transfer - Audio Streaming Sample - Renesas RX231 User Manual

Hear-it! Solution Kit
6.2

Audio Streaming Sample

6.2.1

Operation

After reset, the sample sets up the display and begins streaming of audio from the selected input channel to the
output. The user can switch between the available FIR filter profiles by pressing the button SW3. The pot R43
can be used to control the volume of the speaker (and headphones if fitted). Visual indication of status and
volume are shown on the display.
Caution:
Headphones should be connected to the 3.5mm line-out connector CN5. Connector CN6 is designed to
connect to a speaker only. It is not recommended to attach headphones to speaker connection CN6, as
damage to the headphones may occur. Refer to section 4.2.6 for further information.
6.2.2 PCM Data Transfer – Audio Streaming Sample
16-bit PCM data is generated by the CODEC from the input source and transferred to the receive buffer from
the RX231 SSI(rx) peripheral by DMAC channel 1. The received data is then passed through the DSP filter to
the transmit buffer. This data is then transmitted to the CODEC by DMAC0 and the RX231 SSI(tx) peripheral
for output to speaker/line-out. The sampling frequency for the PCM data is set to 24kHz.
In order to achieve seamless playback each buffer is divided into 3 sub-blocks. The data being transferred into
a buffer is always being placed into a different sub-block to the data being transferred out of the buffer to the
next stage. In this way a continuous supply of data can be maintained.
Figure 6-4 shows this transfer graphically and Table 6-2 shows the operations in progress at each step.
DMAC1 (SSI)
CODEC
IN
Figure 6-4 : Audio Streaming Mode Buffer Processing Overview
Step DMAC1 operation
1 data read into rx buffer (c)
2 data read into rx buffer (a)
3 data read into rx buffer (b)
PCM data transfer between the MCU and the audio Codec is handled by the SSI module and two DMAC
channels. The SSITX empty and SSIRX full interrupts trigger DMAC0 and DMAC1 channels respectively. The
process is illustrated in Figure 6-5.
R12UZ0012EG0110 Rev. 1.10
Apr 03, 2017
Rx Buffer
(a)
2
(b)
3
1
(c)
rx buffer (b) to tx buffer (b)
rx buffer (c) to tx buffer (c)
rx buffer (a) to tx buffer (a)
Table 6-2 : Audio Streaming Mode Buffer Operations
Tx Buffer
DSP Filter
Operation
(a)
3
(b)
1
(c)
2
DSP filter operation
6 Description of Software
DMAC0 (SSI)
1
CODEC
2
OUT
3
DMAC0 operation
tx buffer (a) to CODEC
tx buffer (b) to CODEC
tx buffer (c) to CODEC
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