Logic 0 input level: 0~1VDC (OPTO_IN pin)
Logic 1 input level: 1.5~24VDC (OPTO_IN pin)
Maximum input current: 25 mA
Please make sure the input voltage is not from 1V to 1.5V as the electric status among
the two values is not stable.
Input rising delay (TDR): 2.6μs
Input falling delay (TDF): 19.2μs
3.10.2 Line1 Opto-isolated Output Circuit
In controlling I/O, Line1 output circuit can be shown in Figure 3-54.
User Manual of Area Scan GigE Camera
Figure 3-52 Input Circuit
Figure 3-53 Input Logic Level
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