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Summary of Contents for Arbor Technology EmCORE-i965H
- Page 1 EmCORE-i965H Half Size PCI SBC User’s Manual Version 1.1 2009.11...
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Page 3: Table Of Contents
Index Table of Contents Chapter 1 - Introduction ..........1 1.1 Copyright Notice ............2 1.2 About this User’s Manual .........2 1.3 Warning ..............2 1.4 Replacing the lithium battery ........3 1.5 Technical Support .............3 1.6 Warranty ..............4 1.7 Packing List ...............5 1.8 Ordering Information ..........5 1.9 Specifications ............6 1.10 Board Dimensions ..........7... - Page 4 Index COM1~2: RS-232 Port Connectors ......22 CON1: RS-422/ 485 Connector ......22 JFRT1: Switches and Indicators ......22 IR1: Infrared Connector ........23 LPT1: Parallel Port Connector......23 PWR1: Power Supply Connector ......25 ATX1: ATX Feature Connector ......25 SYSF1: System Fan Connector ......25 TV1: TV-Out Connector .........26 INV1: LCD Inverter Connector ......26 LVDS1: LVDS Connector ........27 SATA1~2: Serial ATA Connectors ......28...
- Page 5 Index 3.6 Advanced Chipset Settings ........51 3.6.1 North Bridge Chipset Configuration ..51 3.6.2 South Bridge Chipset Configuration ..52 3.7 Exit Options .............54 3.8 Beep Sound codes list ...........59 3.8.1 Boot Block Beep codes ......59 3.8.2 POST BIOS Beep codes ......59 3.8.3 Troubleshooting POST BIOS Beep codes 60 3.9 AMI BIOS Checkpoints ...........61 3.9.1 Bootblock Initialization Code Checkpoints ...
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Page 7: Chapter 1 Introduction
Introduction Chapter 1 Introduction Chapter 1 - Introduction - 1 -... -
Page 8: Copyright Notice
Introduction 1.1 Copyright Notice All Rights Reserved. The information in this document is subject to change without prior notice in order to improve the reliability, design and function. It does not represent a commitment on the part of the manufacturer. Under no circumstances will the manufacturer be liable for any direct, indirect, special, incidental, or consequential damages arising from the use or inability to use the product or documentation, even if advised of the possibility of such... -
Page 9: Replacing The Lithium Battery
Introduction 1.4 Replacing the lithium battery Incorrect replacement of the lithium battery may lead to a risk of explosion. The lithium battery must be replaced with an identical battery or a battery type recommended by the manufacturer. Do not throw lithium batteries into the trashcan. It must be disposed of in accordance with local regulations concerning special waste. -
Page 10: Warranty
Introduction 1.6 Warranty This product is warranted to be in good working order for a period of two years from the date of purchase. Should this product fail to be in good working order at any time during this period, we will, at our option, replace or repair it at no additional charge except as set forth in the following terms. -
Page 11: Packing List
Introduction 1.7 Packing List 1 x EmCORE-i96H half-size PCI Single Board Computer & Heatsink 1 x Driver CD 1 x Quick Installation Guide Cable Kit 2 x USB cables 1 x RJ- LAN cable CBK-12-96H-00 1 x Audio cable 1 x KB/MS Y-cable (for EmCORE-i96H1) 1 x LPT to FDD cable 1 x COM port cable... -
Page 12: Specifications
Introduction 1.9 Specifications Form Factor Half-size PCI Single Board Computer Intel® Core™ 2 Duo CPU, up to 800MHz FSB Intel® Celeron® M CPU, with /667MHz FSB Chipset Intel® GME96 + Intel® ICH8M Two 200-pin DDR2 SDRAM Vertical SO-DIMM sockets, System Memory memory capacity up to GB Intel GMA X100 Technology, supports Dual independent VGA/ LCD Controller... -
Page 13: Board Dimensions
Introduction 1.10 Board Dimensions 122.00 118.49 90.15 76.70 48.79 16.99 (4.3) 3.89 44.11 (30.45) EmCORE-965H1 EmCORE-965H2 Unit: mm - 7 -... - Page 14 Introduction This page is intentionally left blank. - 8 -...
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Page 15: Chapter 2 Installation
Installation Chapter 2 Installation Chapter 2 - Installation - 9 -... -
Page 16: Block Diagram
Installation 2.1 Block Diagram Intel® Core™2 Duo/ Celeron® M Processors 533/800MHz Analog R.G.B. 2 x 200-pin DDRII Memory Bus 533/667MHz Vertical SO-DIMM Intel® Sockets Dual Channels LVDS LVDS GME965 CH7307 SDVO I/F Transmitter EmCORE-i965H2 only DMI I/F USB I/F PCI Bus PCI Golden 5 x USB finger... -
Page 17: Jumpers And Connectors
Installation 2.2 Jumpers and Connectors USB2 VGA1 RLAN1 USB4 AUDIO1 KBM1 USB1 DVI1 CFD1 JCF1 IDE1 JKBM1 LLED1 LAN1 9 10 9 10 9 10 SATA2 43 44 SATA1 DIO1 JBAT1 COM2 9 10 LVDS1 9 10 COM1 JVLCD1 9 10 CON1 INV1 LPT1... -
Page 18: Jumpers
Installation Jumpers JCF1: CF Mode Selection (9) JCF1 Connector type: 2.00mm pitch 1x2-pin headers. Mode 9 10 Short Master 43 44 9 10 9 10 9 10 Open Slave (Default) JRS1: COM2 RS-232/422/485 Mode Selection (19) The onboard COM2 port can be configured to operate JRS1 in RS-22 or RS-8 modes. -
Page 19: Jpwr1: At/Atx Power Mode Selection
Installation JPWR1: AT/ATX Power Mode Selection (21) The power mode jumper selects the power mode 9 10 for the system. Connector type: 2.mm pitch 1x2-pin headers. 43 44 Pin 1-2 Mode 9 10 9 10 9 10 Short AT Mode Open ATX Mode (Default) JPWR1... -
Page 20: Jbat1: Clear Cmos Setting
Installation JBAT1: Clear CMOS Setting (28) If the board refuses to boot due to inappropriate 9 10 CMOS settings here is how to proceed to clear (Reset) the CMOS to its default values. 43 44 Connector type: 2. mm pitch 1x-pin headers 9 10 9 10 Mode... -
Page 21: Connectors
Installation Connectors KBM1: Keyboard & Mouse Connector (1) KBM1 Connector Type: 6-pin Mini-Din Keyboard & Mouse connector 9 10 Description KB Data 43 44 9 10 MS Data 9 10 9 10 KB Clock MS Clock Note: KBM1 supports PS/2 keyboard directly, and PS/2 mouse supported with the additional PS/2 1- to-2 cable in standard packing. -
Page 22: Vga1: Analog Rgb Connector
Installation VGA1: Analog RGB Connector (4) VGA1 Connector type: 2.00mm pitch 2x8-pin headers. Desc. Desc. 9 10 GREEN 43 44 BLUE 9 10 9 10 9 10 HSYNC VSYNC - 16 -... -
Page 23: Dvi1: Dvi-I Or Analog Rgb Connector
Installation DVI1: DVI-I or Analog RGB Connector (5) DVI1 Analog RGB Connector Connector type: VGA: D-Sub 1-pin female. (for EmCORE-i96H1) 9 10 Analog 43 44 Pin Desc. Desc. Pin Desc. 9 10 9 10 9 10 GREEN VDDAT BLUE HSYNC VSYNC VDCLK DVI-I Connector... -
Page 24: Rlan1: Primary Gbe Rj-45 Connector
Installation RLAN1: Primary GbE RJ-45 connector (6) RLAN1 LAN1 supports one Ethernet connector on bracket. Connector type: RJ-. 9 10 43 44 8 7 6 5 4 3 2 1 9 10 9 10 9 10 USB4: USB type A connector (8) The EmCORE-i96H CPU board on bracket USB4 supports one type A USB connector that can connect... -
Page 25: Cfd1: Compact Flash Type Ii Socket
Installation CFD1: Compact Flash Type II Socket (7) CFD1 9 10 43 44 9 10 9 10 9 10 Pin Description Pin Description DATA DATA11 DATA DATA12 DATA DATA1 DATA6 DATA1 DATA7 DATA1 CS#1 CS# IOR# IOW# IRQ1 CSEL# IDERST# IORDY DACK# DASP... -
Page 26: Audio1: Hd Connector
Installation AUDIO1: HD Connector (10) AUDIO1 Connect a tape player or another audio source to the light blue Line-in connector to record audio on your 9 10 computer or to play audio through your computer’s sound chip and speakers. 43 44 Connect a micro-phone to the pink microphone 9 10 connector to record audio to your computer. -
Page 27: Ide1: Primary Ide Connector
Installation IDE1: Primary IDE Connector (11) IDE1 An IDE drive ribbon cable has two connectors to support two IDE devices. If a ribbon cable connects 9 10 to two IDE drives at the same time, one of them has to be configured as Master and the other has 43 44 to be configured as Slave by setting the drive select 9 10... -
Page 28: Com1~2: Rs-232 Port Connectors
Installation COM1~2: RS-232 Port Connectors (13,14) Connector type: 2.00mm pitch 2x-pin box headers. Desc. Desc. 9 10 DCD# DTR# COM2 43 44 DSR# 9 10 COM1 9 10 RTS# CTS# 9 10 9 10 10 N/C CON1: RS-422/ 485 Connector (15) Connector type: 2.00mm pitch 1x box wafer connector 9 10... -
Page 29: Ir1: Infrared Connector
Installation IR1: Infrared Connector (16) Connector type: 2.mm pitch 1x-pin headers Voltage 9 10 43 44 IRRX 9 10 9 10 9 10 IRTX The IR connector can be configured to support wireless infrared module, user can transfer files to or from notebooks, PDA and printers. - Page 30 Installation JFRT1: Switches and Indicators (18) It provides connectors for system indicators that 9 10 provides light indication of the computer activities and switches to change the computer status. 43 44 Connector type: 2. mm pitch 2x-pin headers 9 10 9 10 Description Description...
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Page 31: Pwr1: Power Supply Connector
Installation PWR1: Power Supply Connector (20) Connector type: Big -pin .08mm pitch connector. 9 10 Description +12V 43 44 9 10 9 10 9 10 PWR1 ATX1: ATX Feature Connector (22) Connector type: 2.mm pitch 1x-pin box wafer 9 10 connector Description 43 44... -
Page 32: Tv1: Tv-Out Connector
Installation TV1: TV-Out Connector (24) The TV out connector is for output to a television. Connector type: 2.00mm pitch 1x6-pin box wafer 9 10 connector 43 44 Composite Video 9 10 CVBS 9 10 9 10 Unused Unused S-Video Unused Luminance Chrominance INV1: LCD Inverter Connector (25) -
Page 33: Lvds1: Lvds Connector
Installation LVDS1: LVDS Connector (27) The LVDS connector supports 2-bit LVDS. 9 10 VDD could be selected by JVLCD1 in +V or +.V. 43 44 Connector type: DF-1-0DP-1.2V 9 10 9 10 9 10 Description Description LVDS1 TX2CLK+ TX1CLK+ TX2CLK- TX1CLK- TX2D0+ TX1D0+... -
Page 34: Sata1~2: Serial Ata Connectors
Installation SATA1~2: Serial ATA Connectors (29, 30) SATA1~2: Serial ATA Connectors The EmCORE-i96H CPU board on board supports SATA2 SATA1 two SATA connectors, second generation SATA drives transfer data at speeds as high as 00MB/s, twice the transfer speed of first generation SATA drives. 9 10 Description 43 44... -
Page 35: Lled1: Secondary Lan1 Ked Indicator
Installation LLED1: Secondary LAN1 LED Indicator (32) LLED1 Connector type: 2.mm pitch 2x2-pin headers. Description Description 9 10 LED_Y- LED_Y+ 43 44 LED_G- LED_G+ 9 10 9 10 9 10 JKBM1: External keyboard Connector (33) JKBM1 Connector type: 2.00mm pitch 1x6-pin box wafer connector 9 10 Description... -
Page 36: The Installation Paths Of Cd Driver
Installation 2.3 The Installation Paths of CD Driver Windows 2000 & XP Driver Path CHIPSET \CHIPSET\INTEL\INF 9 \ETHERNET\INTEL\827\2K_XP \ETHERNET\INTEL\827\XP_6 \GRAPHICS\INTEL_2K_XP_2\17 \GRAPHICS\INTEL_2K_XP_6\17 AUDIO \AUDIO\REALTEK_HD\Vista_R221 Windows Vista Driver Path CHIPSET \CHIPSET\INTEL\INF 9 \ETHERNET\INTEL\827\Vista_2 \ETHERNET\INTEL\827\Vista_6 \GRAPHICS\INTEL_VISTA_2\111 \GRAPHICS\INTEL_VISTA_6\111 AUDIO \AUDIO\REALTEK_HD\Vista_R221 - 0 -... -
Page 37: Chapter 3 - Bios
BIOS Chapter 3 BIOS Chapter 3 - BIOS - 1 -... -
Page 38: Bios Main Setup
BIOS 3.1 BIOS Main Setup The AMI BIOS provides a Setup utility program for specifying the system configurations and settings. The BIOS ROM of the system stores the Setup utility. When you turn on the computer, the AMI BIOS is immediately activated. The Main allows you to select several configuration options. -
Page 39: Advanced Settings
BIOS System Date Set the system date. Note that the ‘Day’ automatically changes when you set the date. The date format is: Day : Sun to Sat Month : 1 to 12 Date : 1 to 1 Year : 1999 to 2099 3.2 Advanced Settings - -... -
Page 40: Cpu Configuration
BIOS 3.2.1 CPU Configuration The CPU Configuration setup screen varies depending on the installed processor. - -... -
Page 41: Ide Configuration
BIOS 3.2.2 IDE Configuration Primary/Secondary/Third IDE Master Select one of the hard disk drives to configure it. Press <Enter> to access its the sub menu. - -... -
Page 42: Floppy Configuration
BIOS 3.2.3 Floppy Configuration Select the type of floppy disk drive installed in your system. The choice: None 60K .2” 1.2M .2” 720K .” 1.M .” 2.88M .” - 6 -... -
Page 43: Super Io Configuration
BIOS 3.2.4 Super IO Configuration Onboard Floppy Controller Select “Enabled” if your system has a floppy disk controller (FDC) installed on the system board and you wish to use it. If you install and-in FDC or the system has no floppy drive, select Disabled in this field. The Choice: Enabled, Disabled Serial Port1 / Port2 Address Select an address and corresponding interrupt for the first and second serial... -
Page 44: Hardware Health Configuration
BIOS 3.2.5 Hardware Health Configuration H/W Health Function Enables Hardware Health Monitoring Device. CPU FAN Mode Setting This item allows you to set CPU fan speed control mode. System / CPU / Chassis Fan Speed Show you the current System / CPU / Chassis Fan operating speed. VDIMM Show you the voltage level of the DRAM. -
Page 45: Acpi/Apm Configuration
BIOS Vcore Show you the voltage level of CPU (Vcore). +3.30V / +5.00V / +12.0V / -12.0V / 5Vsb / VBAT Show you the voltage level of the +.V, +.0V, +12.0V, -12.0V, +V standby and battery. 3.2.6 ACPI/APM Configuration ACPI Aware O/S This item allows you to enable/disable the Advanced Configuration and Power Management (ACPI) The Choice: Enabled, Disabled. -
Page 46: Power Button Mode
BIOS Power Management/APM This category allows you to select the type (or degree) of power saving and is directly related to the following modes: 1. HDD Power Down 2. Doze Mode . Suspend Mode Power Button Mode Pressing the power button for more than seconds forces the system to enter the Soft-Off state when the system has “hang”. -
Page 47: Remote Access Configuration
BIOS 3.2.7 Remote Access Configuration Remote Access Configure Remote Access type and parameters. The Choice: Enabled, Disabled. Serial port number Select Serial Port for console redirection. Make sure the selected port is enabled. The Choice: COM1, COM2. - 1 -... -
Page 48: Flow Control
BIOS Base Address, IRQ Select Serial Port for console redirection. Make sure the selected port is enabled. The Choice: F8, IRQ 2E8, IRQ E8, IRQ 2F8, IRQ Serial Port Mode Select Serial Port settings. Flow Control Select Flow Control for console redirection. Redirection After BIOS POST Disable: Turns off the redirection after POST BOOT Loader, redirection is active during POST and during BOOT Loader. -
Page 49: Usb Configuration
BIOS 3.2.8 USB Configuration Legacy USB Support Enables support for legacy USB. AUTO option disables legacy support if no USB devices are connected. USB 2.0 Controller Mode Configures the USB 2.0 controller in High Speed (480Mbps) or Full Speed (12Mbps). - -... -
Page 50: Usb Mass Storage Device Configuration
BIOS BIOS EHCI Hand-Off This is a work around for OSs without EHCI hand-Off support. The EHCI ownership change should claim by EHCI driver. USB Mass Storage Device Configuration Number of seconds POST waits for the USB mass storage device after start unit command. -
Page 51: Advanced Pci/Pnp Settings
BIOS 3.3 Advanced PCI/PnP Settings Clear NVRAM Clear NVRAM during System BOOT. The Choice: Yes, No. - -... -
Page 52: Pci Latency Timer
BIOS Plug & Play O/S No: Lets the BIOS configure all the devices in the system. Yes: lets the operating system configure Plug and Play (PnP) devices not required for BOOT if your system has a Plug and Play operating sys- tem. -
Page 53: Boot Settings
BIOS 3.4 Boot Settings Boot Device Priority Press Enter and it shows Bootable add-in devices. Hard Disk Drives Press Enter and it shows Bootable Hard Disk drives. Removable Drives Press Enter and it shows Bootable and Removable drives. - 7 -... -
Page 54: Boot Settings Configuration
BIOS 3.4.1 Boot Settings Configuration Quick Boot Allows BIOS to skip certain tests while booting. This will decrease the time needed to boot the system. Bootup Num-Lock Set this value to allow the Number Lock setting to be modified during boot Interrupt 19 capture Enabled: Allows option ROMs to trap interrupt 19. -
Page 55: Security
BIOS 3.5 Security Supervisor Password & User Password You can set either supervisor or user password, or both of then. The differences between are: Set Supervisor Password: Can enter and change the options of the setup menus. Set User Password: Just can only enter but do not have the right to change the options of the setup menus. -
Page 56: Boot Sector Virus Protection
BIOS Type the password, up to eight characters in length, and press <Enter>. The password typed now will clear any previously entered password from CMOS memory. You will be asked to confirm the password. Type the password again and press <Enter>. You may also press <ESC> to abort the selection and not enter a password. -
Page 57: Advanced Chipset Settings
BIOS 3.6 Advanced Chipset Settings 3.6.1 North Bridge Chipset Configuration DRAM Frequency The item allows you to set the DRAM frequency. Configure DRAM Timing by SPD Select the operating system that is selecting SRAM timing, so select SPD for setting SDRAM timing by SPD. The Choice: Enable, Disable Initate Graphic Adapter Select which graphics controller to use as the primary boot device. -
Page 58: South Bridge Chipset Configuration
BIOS Internal Graphic Mode Select Select the amount of system memory used by the Internal graphics device. VIdeo Function Configuration DVMT Mode Select This item allows you to configure the DVMT Mode. The Choice: Fixed , DVMT DVMT/FIXED Memory This item allows you to configure the DVMT memory size. The Choice: 128MB, 26MB. - Page 59 BIOS USB Funtion This item allows you to active USB ports. The Choice: Disabled 2 USB Ports USB Ports 6 USB Ports USB 2.0 Controller Select “Enabled” if your system contains a Universal Serial Bus 2.0 (USB 2.0) controller and you have USB peripherals. The Choice: Enabled, Disabled.
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Page 60: Exit Options
BIOS 3.7 Exit Options Save Changes and Exit Pressing <Enter> on this item asks for confirmation: Save configuration changes and exit setup? Pressing <OK> stores the selection made in the menus in CMOS - a special section of memory that stays on after you turn your system off. The next time you boot your computer, the BIOS configures your system according to the Setup selections stored in CMOS. -
Page 61: Discard Changes And Exit
BIOS Discard Changes and Exit Exit system setup without saving any changes. <ESC> key can be used for this operation. - -... -
Page 62: Discard Changes
BIOS Discard Changes Discards changes done so far to any of the setup questions. <F7> can be used for this operation. - 6 -... -
Page 63: Load Optimal Defaults
BIOS Load Optimal Defaults When you press <Enter> on this item you get a confirmation dialog box with a message: Load Optimal Defaults? [OK] [Cancel] Pressing [OK] loads the BIOS Optimal Default values for all the setup questions. <F9> key can be used for this operation. - 7 -... -
Page 64: Load Failsafe Defaults
BIOS Load Failsafe Defaults When you press <Enter> on this item you get a confirmation dialog box with a message: Load Failsafe Defaults? [OK] [Cancel] Pressing [OK] loads the BIOS Failsafe Default values for all the setup questions. <F8> key can be used for this operation. - 8 -... -
Page 65: Beep Sound Codes List
BIOS 3.8 Beep Sound codes list 3.8.1 Boot Block Beep codes Number of Beeps Description Insert diskette in floppy drive A: ‘AMIBOOT.ROM’ file not found in root directory of diskette in A: Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error... -
Page 66: Troubleshooting Post Bios Beep Codes
BIOS 3.8.3 Troubleshooting POST BIOS Beep codes Number of Beeps Description Reseat the memory, or replace with known good 1, 2 or modules. Fatal error indicating a serious problem with the system. Consult your system manufacturer. Before declaring the motherboard beyond all hope, eliminate the possibility of interference by a malfunctioning add-in card. -
Page 67: Ami Bios Checkpoints
BIOS 3.9 AMI BIOS Checkpoints 3.9.1 Bootblock Initialization Code Checkpoints The Bootblock initialization code sets up the chipset, memory and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS (Note) Checkpoint... - Page 68 BIOS Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. If BIOS recovery is necessary, control flows tocheckpoint E0. Seed Bootblock Recovery Code Checkpoints section of document for more information. Restore CPUID value back into register. The Bootblock- Runtime interface module is moved to system memory and control is given to it.
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Page 69: Bootblock Recovery Code Checkpoints
BIOS 3.9.2 Bootblock Recovery Code Checkpoints The Bootblock recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt. The following table describes the type of checkpoints that may occur during the Bootblock recovery portion of the BIOS (Note) - Page 70 BIOS Erase the flash part. Program the flash part. The flash has been updated successfully. Make flash write disabled. Disable ATAPI hardware. Restore CPUID value back into register. Give control to F000 ROM at F000:FFF0h. - 6 -...
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Page 71: Post Code Checkpoints
BIOS 3.9.3 POST Code Checkpoints The POST code checkpoints are the largest set of checkpoints during the BIOS pre-boot process. The following table describes the type of checkpoints that may occur during the POST portion of the BIOS (Note) Checkpoint Description Disable NMI, Parity, video for EGA, and DMA controllers. - Page 72 BIOS Early CPU Init Exit Initializes the 802 compatible Key Board Controller. Detects the presence of PS/2 mouse. Detects the presence of Keyboard in KBC port. Testing and initialization of different Input Devices. Also, update the Kernel Variables. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1.
- Page 73 BIOS Initializes different devices through DIM. See DIM Code Checkpoints section of document for more information. USB controllers are initialized at this point. Initializes DMAC-1 & DMAC-2. Initialize RTC date/time. Test for total memory installed in the system. Also, Check for keys to limit memory test.
- Page 74 BIOS Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Disables the system configuration display if needed. Initialize runtime language module. Display boot option popup menu.
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Page 75: Dim Code Checkpoints
BIOS 3.9.4 DIM Code Checkpoints The Device Initialization Manager (DIM) gets control at various times during BIOS POST to initialize different system buses. The following table describes the main checkpoints where the DIM module is accessed (Note) Checkpoint Description Initialize different buses and perform the following functions: Reset, Detect, and Disable (function 0);... - Page 76 BIOS While control is in the different functions, additional checkpoints are output to port 80h as a word value to identify the routines under execution. The low byte value indicates the main POST Code Checkpoint. The high byte is divided into two nibbles and contains two fields. The details of the high byte of these checkpoints are as follows: HIGH BYTE XY The upper nibble “X”...
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Page 77: Acpi Runtime Checkpoints
BIOS 3.9.5 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state. The following table describes the type of checkpoints that may occur during ACPI sleep or wake events (Note) Checkpoint Description First ASL check point. - Page 78 BIOS This page is intentionally left blank. - 72 -...
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Page 79: Chapter 4 - Appendix
Appendix Chapter 4 Appendix Chapter 4 - Appendix - 7 -... -
Page 80: I/O Port Address Map
Appendix 4.1 I/O Port Address Map Each peripheral device in the system is assigned a set of I/O port addresses which also becomes the identity of the device. The following table lists the I/O port addresses used. Address Device Description 00000000 - 0000000F DMA Controller 00000080 - 0000009F... -
Page 81: Interrupt Request Lines (Irq)
Appendix 4.2 Interrupt Request Lines (IRQ) Peripheral devices use interrupt request lines to notify CPU for the service required. The following table shows the IRQ used by the devices on board. Level Function IRQ 0 System Timer IRQ 1 Keyboard Controller IRQ 2 VGA and Link to Secondary PIC IRQ ... -
Page 82: Watchdog Timer (Wdt) Setting
Appendix 4.4 Watchdog Timer (WDT) Setting WDT is widely used for industry application to monitoring the activity of CPU. Application software depends on its requirement to trigger WDT with adequate timer setting. Before WDT time out, the functional normal system will reload the WDT. - Page 83 Appendix AX, 2Eh DX, AX AL, 0F0h DX, AL ; select CRF0 AL, 00h DX, AL ; set CRF0=00h, output AX, 2Eh DX, AX AL, 0Fh DX, AL ; select CRF, WDT Timer unit AL, 00h ; bit2 =0 ->second ; bit2 =1 -> minute DX, AL ;...
- Page 84 Appendix C language Code /*----- Include Header Area -----*/ #include "math.h" #include "stdio.h" #include "dos.h" /*----- routing, sub-routing -----*/ void main() outportb(0x2e, 0x87); /* initial IO port twice */ outportb(0x2e, 0x87); outportb(0x2e, 0x2B); /* select CR2B */ outportb(0x2e+1, 0x00); /* update CR2B bit to 00h */ /* Set PIN89 as WDTO */ outportb(0x2e, 0x07);...
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Page 85: Digital I/O Setting
Appendix 4.5 Digital I/O Setting Below are the source codes written in assembly & C, please take them for Digital I/O application examples. Assembly Code ;-- Initial W8627hf -- AX, 2Eh DX, AX AL, 87h DX, AX DX, AX ; initial W8627HF start AX, 2Eh DX, AX AL, 2Ah... - Page 86 Appendix DX, AL ; bit7~bit0 0:output 1:input AX, 2Eh DX, AX AL, 0F1h DX, AL ; select CRF1, Data Register AL, 0FFh DX, AL ; set all GPIO pin output 1 AX, 2Eh DX, AX AL, 0F1h DX, AL ; select CRF1, Data Register AL, 000h DX, AL ;...
- Page 87 Appendix C language Code /*----- Include Header Area -----*/ #include "math.h" #include "stdio.h" #include "dos.h" /*----- routing, sub-routing -----*/ void main() outportb(0x2e, 0x87); /* initial IO port twice */ outportb(0x2e, 0x87); outportb(0x2e, 0x2a); /* Select CR2A */ outportb(0x2e+1, 0xfc); /* set CR2A bit7=1 as GPIO port 1*/ outportb(0x2e, 0x07);...
- Page 88 Appendix This page is intentionally left blank. - 82 -...
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