Internal Reference Voltage Levels; Block Diagram - Samsung S3C9228 User Manual

S3C9228/P9228_UM_REV1.10
MSB
MSB

INTERNAL REFERENCE VOLTAGE LEVELS

In the ADC function block, the analog input voltage level is compared to the reference voltage. The analog input
level must remain within the range V
Different reference voltage levels are generated internally along the resistor tree during the analog conversion
process for each conversion step. The reference voltage level for the first conversion bit is always 1/2 V

BLOCK DIAGRAM

(Select one input pin of the assigned pins)
Input Pins
AD0-AD3
(P1.0-P1.3)
P1CON
(Assign Pins to ADC Input)
Conversion Data Register ADDATAH/ADDATAL
D1H/D2H, Page 0, Read Only
.9 .8 .7
- - -
Figure 14-2. A/D Converter Data Register (ADDATAH/ADDATAL)
to V
SS DD
ADCON.4-5
ADCON.0
(AD/C Enable)
M
U
. .
.
X
ADCON.0
(AD/C Enable)
Figure 14-3. A/D Converter Functional Block Diagram
.6 .5 .4 .3
- - - .1
.
Analog
-
Comparator
+
V
DD
10-bit D/A
Converter
V
SS
.2 LSB (ADDATAH)
.0 LSB (ADDATAL)
ADCON.2-.1
Clock
Selector
Successive
Approximation
Logic & Register
Conversion Result
(ADDATAH/ADDATAL,
D1H/D2H, Page 0)
A/D CONVERTER
.
DD
To ADCON.3
(EOC Flag)
14-3