Two 8-Bit Timers Mode (Timer A And B); Overview - Samsung S3C9228 User Manual

TIMER 1

TWO 8-BIT TIMERS MODE (TIMER A and B)

OVERVIEW

The 8-bit timer A and B are the 8-bit general-purpose timers. Timer A and B have the interval timer mode by using
the appropriate TACON and TBCON setting, respectively.
Timer A and B have the following functional components:
— Clock frequency divider with multiplexer
– fxx divided by 512, 256, 64, 8 or 1, fxt, and T1CLK (External clock) for timer A
– fxx divided by 512, 256, 64, 8 or 1, and fxt for timer B
— 8-bit counter (TACNT, TBCNT), 8-bit comparator, and 8-bit reference data register (TADATA, TBDATA)
— Timer A have I/O pin for match output (TAOUT)
— Timer A match interrupt generation
— Timer A control register, TACON (page 0, BBH, read/write)
— Timer B match interrupt generation
— Timer B control register, TBCON (page 0, BAH, read/write)
Timer A and B Control Register (TACON, TBCON)
You use the timer A and B control register, TACON and TBCON, to
— Enable the timer A (interval timer mode) and B operating (interval timer mode)
— Select the timer A and B input clock frequency
— Clear the timer A and B counter, TACNT and TBCNT
— Enable the timer A and B interrupt
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S3C9228/P9228_UM_REV1.10