Clocks; Cy22150 Reference Clock; Figure 5-1 Cy22150 Block Diagram - Rastergraf Topaz User Manual

Rastergraf

5.3 Clocks

5.3.1 CY22150 Reference Clock

Because the SM731 video output encoder is sensitive to clock frequency,
the Topaz, Duros, and Garnet have an enhanced clock circuit that permits
the clock to be fine-tuned for optimum encoder operation.
A low-noise clock, the Cypress CY22150, programmed via an I
provides a highly stable clock.
Rastergraf software knows to look for the CY22150 and will program it
accordingly.

Figure 5-1 CY22150 Block Diagram

XIN
XOUT
SDAT
SCLK
5-12 Programming On-board Devices and Memories
Φ
OSC. Q
VCO
P
PLL
I2C
Control
Divider
Bank 1
Crosspoint
Switch
Matrix
Divider
Bank 2
2
C port,