Instruction
:=;LB {address}
L
C]
F:LR {address} [" :=:]
F'LFI {address} [, C]
F:LB {address} [" :=:]
F:LB {address}
L
C]
:=:(:1:=; {address} [, :=:]
:=:()'=: {address} [" C]
'=:(:IC {address} [, '=:]
:=;iJC {address} [" C]
:=;E:=: {address}
L
:=;]
:=:E :=: {address}
L
C]
The Processor and the Operating System
39
Description
Skips to {address} if the least significant bit of the B register is
O.
Skips to {address} if the least significant bit of the A register is
not O.
Skips to {address} if the least significant bit of the B register is
notO.
Skips to {address} if the Overflow flag in the processor is set.
Skips to {address} if the Overflow flag in the processor is
cleared.
Skips to {address} if the Extend flag in the processor is set.
Skips to {address} if the Extend flag in the processor is
cleared.
NOTE
The Extend and Overflow flags can be cleared only by using
the SEC, SES, SOC, and SOS instructions with the" C op-
tion.