HP 9835A Programming Manual page 108

Arithmetic
91
One symbolic way to indicate how this multiplication is done is -
A B C D
x W X Y Z
0 0 0 0 partial product 0
Zov Zl Z2 Z3 Z4
Z (ABCD) x 10°
P4 Ps P6 P7 Ps
partial product 1
Yov Yl Y2 Y3 Y4 0 Y (ABCD)
X
10
1
P3 P4 Ps P6 P7 Ps partial product 2
Xov Xl X2 X3 X4 0 0
X (ABCD)
X
10 2
P2 P3 P4 Ps P6 P7 Ps partial product
3
Wov WI W2 W3 W4 0 0 0
W (ABCD)
X
10 3
PI P2 P3 P4 Ps P6 P7 Ps partial product 4 (result)
Notice that at each stage the multiple of ABCD, such as X(ABCD), must be multiplied by an
increasing power of ten in order that the digits of the multiple line up appropriately with the
digits of the last partial product. An equivalent procedure is to have the partial product shifted
right one digit at each stage.
Now, consider for a moment what is necessary within the assembly language to generate partial
product 1
=
0
+
Z (ABCD). Ar2 must be cleared and Ar1 is loaded with ABCD. Z is stored into
B in bits 0 to 3. Then the FMP instruction is executed. Ar1 is added to Ar2 Z times, producing Z
(ABCD) in Ar2. The overflow digit, Zov, ends up in the A register (bits 0 to 3). The overflow digit
could be any value from 0 to 9 (each add could cause a carry, and there can
b~
up to nine
additions).
To create the next partial product, a mantissa right-shift on Ar2 must occur. Notice that man-
tissa right-shifting instructions (MR?< and MRY) also shift bits 0 to
3
of the A register into Dl.
Thus, the right-shifting of the partial product (which must occur to prepare Ar2 for the next
partial product) also automatically takes care of retaining the overflow digit.
Next, ABCD is added to Zov Zl Z2 Z3 a total of Y times (again by use of the FMP instruction).
Partial product 2 is created. The process is repeated for the X and W digits, producing the result
in Ar2.