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Appendix B: Machine Instructions
Instruction
Form
Group
Description
Page
EXE
{reg} [
L]
Miscellaneous
Executes the contents of a register. {reg} is an in-
47
teger in the range of 0 through 31, indicating the
register to be used (see Memory Map for the cor-
respondence between location and register). The
register is left unchanged unless the instruction
code causes it to be altered. The next instruction
to be executed is the one following the EXE, un-
less the code in the executed register causes a
branch. Indirect addressing may be specified.
FDV
BCD Math
Fast divide. The mantissas of Arl and Ar2 are
46
added together, along with Decimal Carry, until
the first decimal overflow occurs. The result ac-
cumulates into Ar2. The number of additions
without overflow is placed into the lower 4 bits of
the B register (0-3). The remainder of the B regis-
ter is cleared, as is the Decimal Carry bit in the
processor.
FMP
BCD Math
Fast Multiply. Performs the multiplication by re-
46
peated additions. The mantissa of Arl is added to
Ar2 along with Decimal carry, a specified number
of times. The number of times is specified in the
lower 4 bits (0-3) of the B register. The result ac-
cumulates in Ar2. If intermediate overflows occur,
the number of times they occur appears in the
lower 4 bits of the A register after the operation is
complete. The upper 12 bits of the A register are
cleared along with Decimal Carry.
FXA
BCD Math
Fixed-point addition. The mantissas of Arl and
46
Ar2 are added together and the result placed in
Ar2. Decimal Carry is used as the twelfth digit.
After the addition, Decimal Carry is setif an over-
flow occurred, otherwise Decimal Carry is cleared.
lOR
{loc} [
]
Logical
Logical "inclusive or" operation. The contents of
41
the A register are compared, bit by bit, with the
contents of the specified location. For each bit
comparison, a 0 results if both bits are O's, a 1
otherwise. The l6-bit result is left in A. Specifying
register R4, R5, R6, or R7 causes an input bus
cycle to the interface addressed by the Pa register.
Indirect addressing may be specified. {loc} must
be on base or current page.
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