HP 9835A Programming Manual page 233

Appendix B: Machine Instructions 211
Instruction Form Group Description Page
ISZ {loc} [ '] T est/ Alter/Branch Increments the contents of the specified location
38
and skips if the new contents are O. Specifying
register R4, R5, R6, or R7 causes an input (or an
input followed by an output) bus cycle to the inter-
face addressed by the Pa register. Indirect addres-
sing may be specified. {loc} must be on base or
current page.
JMP {loc} [" r] Branch Unconditionally branches to the specified loca-
36
tion. Indirect addressing may be specified. {Ioc}
must be on base or current page.
JSM {loc} [ ] Branch Jumps to subroutine. The value of the R register
36
is incremented by 1 and the value of the P regis-
ter
(i.
e., the location of the JSM instruction itself)
is stored in the address pOinted to by the R regis-
ter. Execution then proceeds to the specified lo-
cation. Return from the subroutine is effected by
the RET instruction. Indirect addressing may be
specified. {loc} must be on base or current page.
LOA {Ioc} [ ] Load/Store Loads register A with the con ten ts of the
34
specified location. Specifying register R4, R5,
R6, or R7 causes an input I/O bus cycle to the
interface addressed by the Pa register. Indirect
addressing may·be specified. {Ioc} must be on
base or current page.
LOB {loc} [ , ] Load/Store Loads register B with the contents of the
34
specified location. Specifying register R4, R5,
R6, or R7 causes an input I/O bus cycle to the
interface addressed by the Pa register. Indirect
addressing may be specified. {Ioc} must be on
base or current page.
MLY r"1l_ BCD Math Mantissa left shift on Ar2 for one digit. This is a 45
circular shift, with the bits 0-3 of the A register
forming a thirteenth digit. The non-digit part of
the A register is cleared (bits 4-15), and the Dec-
imal Carry bit in the processor is cleared.
I