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Appendix B: Machine Instructions
Instruction
Form
Group
PWC
Pl,-lC {reg} , D
Stack
F' l -<H:::: {reg} [, I]
PWD
P
~,-j
D
{reg} , [,
Stack
Pl-,m {reg} [, I]
RAL
PRL
in}
Shift/Rota te
RAR
PRP
in}
Shift/Rotate
RBL
F'BL
in}
Shift/Rotate
RBR
PBP
in}
Shift/Rotate
RET
F'ET
in}
Branch
Description
Page
Pushes entire register (full word) onto the stack
43
pOinted at by the C register. Specifying register
R4, R5, R6, or R7 causes an input I/O bus cycle to
the interface addressed by the Pa register. Incre-
menting or decrementing the
C
register may be
specified. Incrementing is the default. {reg} must
be in the range of 0 through 7. The incrementing
or decremen ting action takes place before
pushing.
Pushes the entire register (full word) onto the
stack pointed at by the 0 register. Specifying
register R4, R5, R6, or R7 causes an input I/O bus
cycle to the interface addressed by the Pa register.
Incrementing or decrementing the 0 register may
be specified. Incrementing is the default. {reg}
must be in the range of 0 through 7. The
incrementing or decrementing action taken place
before pushing.
43
Rotates the A register left the indicated number of
40
bits. Bit 15 rotates into bit 0 (left circular).
Maximum rotation of 16 bits.
Rotates the A register right the indicated number
40
of bits. Bit 0 rotates into bit 15 (right circular).
Maximum rotation of 16 bits.
Rotates the B register left the indicated number of
40
bits. Bit 15 rotates into bit 0 (left circular).
Maximum rotation of 16 bits rotated.
Rotates the B register right the indicated number
of bits. Bit 0 rotates into bit 15 (right circular).
Maximum rotation of 16 bits.
Returns from subroutine. in} is added to the con-
tents of the address pOinted to by the R register.
The R register is decremented by 1. This is, in
effect, a return from a JSM instruction (see
above), to in} instructions following the JSM itself.
The "usual" return is RET 1. in} must be in the
range of - 32 through 31.
40
36
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