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Ethernet frames are mapped over a SDH VC using Generic Framing Procedure encapsulation.
As SDH Network is transparent, the customer Boxes see them as directly connected in a mesh.
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ISA–ES (Ethernet Switching).
ISA–ES series modules provide ETH 10/100/1000 interfaces connectivity for LAN based clients
premises inside the metro area.
Beyond mapping ETH flows onto the SDH metro network by means of standard mechanisms
(as specified in ITU G.7071, ITU G.7042 and ITU G.707) the ISA–ES series cards introduce wire
speed classifying, policing and scheduling capability empowered by carrier class Ethernet
switching engine.
Per customer traffic flow management with low bandwidth granularity, segregation and QoS are
just few of the value added arguments that these series of modules offer to the carrier operators
at a competitive price.
When 1660SM is used as Add/Drop Multiplexer , mixed STM–N ports can be used in the same
configuration thus allowing to manage in the same equipment and at the same time STM–1 , STM–4,
STM–16 and STM–64 rings (multiring).
A large variety of STM–N optical plug–in modules operating at 1300 nm and 1550 nm is available to cover
short and long haul systems. Dedicated optical interfaces are also available to inter–work with boosters
and optical pre–amplifiers at all STM–N levels.
1660SM also features "coloured" STM–16 interfaces for direct interworking with WDM equipment without
intermediate wavelength adapters.
All the electrical units (traffic ports) and the common units can be optionally EPS protected with different
modularity (1+1; 1+N with 1 v N v15 as far as regards the traffic ports ):
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The EPS protection of the High Speed electrical traffic units ( 34 Mbit/s, 45 Mbit/s and155 Mbit/s) is
implemented using a dedicated access module.
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The EPS protection of the ATM/PR_EA units is implemented.
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The EPS protection of the ISA–ES16 units is implemented.
According to the network topology, network protection mechanisms are provided:
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Single ended and dual ended MSP (Multiplex Section Protection) can be implemented at any STM–N
level.
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MS–SPRing (Multiple Section Shared Protection Ring) on two fibers bidirectional rings can be
implemented at STM–16 level.
A centralized matrix implements the cross–connect function and can be protected in 1+1 EPS scheme.
The maximum matrix cross connection capability can be 256x256 STM–1 equivalent port at VC–12 /
VC–3 level + 384x384 equivalent port at VC–4 level.
A wide auxiliary capacity, in accordance with SDH standards, is available for embedded services. An
Engineering Order Wire channel, with DTMF signalling, can be accessed by a microtelephone for
maintenance facility.
The clock reference function, housed in the centralized unit (MATRIX), synchronizes the 1660SM and
provides generation and distribution of a synchronism clock. The distributed clock can be locked to an
external 2MHz or 2Mbit/s source, to any STM–N or 2Mbit/s tributary signal.
The SSM (Synchronization Status Message) and priority algorithms are supported.
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