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[3] Ethernet Mapping over SDH (GFP/LAPS)
Ethernet packets are encapsulated and mapped into SDH frames for transmission. Ethernet mapper
supports 8 independent channels for EOS encapsulation.
Each channel can be mapped with multi SDH containers with appropriate bandwidth, such as
VC12s/VT1.5, VC3s/STS–1s, or VC4s/STS–3c.
Both high order and low order concatenation are supported, moreover, virtual concatenation with LCAS
(Link Capacity Adjustment Scheme) providesr customer with powerful dynamic bandwidth adjustment
scheme to fit various needs.
Basic feature list as follows:
•
Multi encapsulation mode supported:
–
GFP Generic Framing Procedure (ITU–T G.7041)
–
LAPS Link Access Procedure SDH (ITU–T X.86/X.85)
–
BCP PPP Bridge Control Protocol (RFC 1662/2878)
•
Low order/High order Contiguous and Virtual Concatenation supported
•
Container supported:
–
VC12–xv (x = 1 to 63)
–
VC3–xv (x = 1 to 3)
•
Differential delay compensation = 48 ms
[4] Bus converter
The task of the Bus converter is to translate 19 Mb/s A/D bus to 155 Mb/s data stream.
[5] SDH interfacing with Back Panel (TTF and LVC)
The TTF block is connected to the two central boards (MATRIXN) through 1 +1 links @622 Mbit/s in LVDS.
TTF (Transport Terminal Function) block provides SDH termination for Regenerator Section and Multiplex
Section.
The LVC block is connected both to the HPC matrices and to the LPC matrices on the MATRIXN card
through couple of 1+1 links @ 622 MBit/s working in protection, LVDS format, STM–4 equivalent capacity.
LVC circuits perform the HOA function (Higher Order Assembler) and the Lower Order functions LTCM
or LTCT sink, LPOM or LSUT sink, LSUT source and LTC source up to 4 STM1 equivalent.
[6] Microprocessor
It is a microcontroller controlling and supporting the Ethernet functionalities, such as: configuration,
alarms and states collections, performances monitoring, communications with the Shelf Controller
(SC, on MATRIX unit) and with the OS, etc. It communicates with the SC by means of the
configuration bus for SDH functions (SDH–CS), coming from the Management bus ISPB (intra shelf
parallel bus). It is provided with relevant devices SDRAM (for data memory) and Flash EPROM (for
program memory).
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