Alcatel 1660SM Technical Handbook page 466

MST/RST So
This block performs:
•
insertion of extracted and stored SOH bytes
•
calculation and insertion of B1 and B2 bytes
•
standard SONET scrambler
PISO: this block performs the Parallel to Serial conversion (PISO) of the SONET STS3/OC3 stream
towards the line.
G.A. (Gate Array)
The SDH functions are implemented by the G.A. mounted on the board. It interfaces the two MATRIX
cards via backpanel.
Referring to the ITU–T G.783 Recommendation , the G.A. performs the following functions :
– TTF
– HOA
– LPOM /LSUT (the last is not available in this release)
– HPOM /HSUT (the last is not available in this release)
Cross connection functions (MSP, HPC and LPC) are performed by the matrices present on the two
MATRIX boards (working in 1+1 configuration).
The TTF block is connected to the MATRIX boards (main and spare) through 1+1 bidirectional links at
622 Mbit/s , STM–4 equivalent capacity.
HOA block is connected both to the HPC matrices and to the LPC matrices on the two MATRIX boards
through a couple of 1+1 links at 622 MBit/s working in protection, STM–4 equivalent capacity.
Backpanel interface supply a system–clock to the G.A. internal circuits.
In the following block description, the new naming convention of the G.783 is reported. Refer to para. 3.3.4
on page 206 for details.
The G.A. send and receive four signals (data + clock) to/from the four "AU3/TU3 CONVERSION block"
An external LOS is received from each input line interface.
Each optical transmitter provides its status by means of two input signals: Laser Degrade and Laser
Failure.
The ALS algorithm is hardware implemented : the G.A. provides the Laser shut Down command (LASER
OFF).
In the following will be described the signal processing of only one signal from/to "AU3/TU3 CONVERSION
block"; the other three interfaces process the signal in the same way.
The PISO & SIPO (Parallel–In Serial–Out; Serial–in Parallel–out) blocks allow the unit to interface with
the back panel at of 622 Mbit/s bit rate, mapping the signals over a STM–4 internal equivalent frame.
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